Wide operating V_CC range of 0.9 V to 3.6 V
3.6-V I/O Tolerant to support mixed-mode signal operation
Max t_pd of 3.7 ns at 3.3 V
Balanced propagation delays: t_PLH = t_PHL
Low static-power consumption, 5-µA Max I_CC
Outputs disabled if either V_CC goes to 0V
±3-mA Output drive at 1.8 V
26-Ω series resistor on A-side outputs
I_off supports partial power-down-mode operation
Input hysteresis allows slow input transition and better switching noise immunity at input
Maximum data rates
- 380 Mbps (1.8-V to 3.3-V translation)
- 200 Mbps (<1.8-V to 3.3-V translation)
- 200 Mbps (translate to 2.5 V or 1.8 V)
- 150 Mbps (translate to 1.5 V)
- 100 Mbps (translate to 1.2 V)
Latch-up performance exceeds 100 mA Per JESD 78, Class II
ESD protection exceeds JESD 22
- 2000-V human-body model (A114-A)
- 500-V charged-device model (C101)

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This 4-bit non-inverting bus transceiver uses two separate configurable power-supply rails to enable asynchronous communication between B-port inputs and A-port outputs. The A port is designed to track V_CCA while the B port is designed to track V_CCB. Both V_CCA and V_CCB are configurable from 0.9 V to 3.6 V.

The SN74AVC4T234 solution offers the industry’s low-power needs in battery-powered portable applications by ensuring both a very low static and dynamic power consumption across the entire V_CC range of 0.9 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The V_CC isolation feature ensures that if either V_CC input is at GND, then A-side ports are in the high-impedance state.

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	Type	Title	Date
*	Datasheet	SN74AVC4T234 4-Bit Dual-Supply Bus Transceiver With Config Voltage Translation datasheet (Rev. B)	Jul. 01, 2020
	Selection guides	Voltage translation buying guide	Jun. 13, 2019
	Selection guides	Logic Guide (Rev. AB)	Jun. 12, 2017
	Application notes	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	Dec. 02, 2015
	More literature	Voltage-Level Translation Guide (Rev. H)	Aug. 31, 2015
	Application notes	Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)	Apr. 30, 2015
	User guides	LOGIC Pocket Data Book (Rev. B)	Jan. 16, 2007
	Application notes	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	Jul. 08, 2004
	Application notes	Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. A)	Jul. 08, 2004
	Application notes	Selecting the Right Level Translation Solution (Rev. A)	Jun. 22, 2004
	More literature	Logic Cross-Reference (Rev. A)	Oct. 07, 2003
	More literature	LCD Module Interface Application Clip	May 09, 2003
	User guides	AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C)	Aug. 20, 2002
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards	Jun. 13, 2002
	Application notes	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)	May 22, 2002
	Application notes	Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)	Jul. 07, 1999
	Application notes	AVC Logic Family Technology and Applications (Rev. A)	Aug. 26, 1998