SN74AVCH20T245

ACTIVE

20-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs

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20-Bit Dual-Supply Bus Transceiver with Configurable Voltage Translation and 3-State Outputs

SN74AVCH20T245

ACTIVE

Product details

Parameters

Technology Family AVC Bits (#) 20 High input voltage (Min) (Vih) 0.8 High input voltage (Max) (Vih) 3.6 Output voltage (Min) (V) 1.2 Output voltage (Max) (V) 3.6 IOH (Max) (mA) -12 IOL (Max) (mA) 12 Rating Catalog open-in-new Find other Direction-controlled voltage translators

Package | Pins | Size

TSSOP (DGG) 56 113 mm² 14 x 8.1 TVSOP (DGV) 56 72 mm² 11.3 x 6.4 open-in-new Find other Direction-controlled voltage translators

Features

  • Control Inputs VIH/VIL Levels are Referenced to VCCA Voltage
  • VCC Isolation Feature - If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range
  • Ioff Supports Partial-Power-Down Mode Operation
  • I/Os Are 4.6-V Tolerant
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Max Data Rates
    • 380 Mbps (1.8-V to 3.3-V Translation)
    • 260 Mbps (1.8-V to 3.3-V Translation)
    • 260 Mbps (Translate to 2.5 V)
    • 210 Mbps (Translate to 1.8 V)
    • 120 Mbps (Translate to 1.5 V)
    • 100 Mbps (Translate to 1.2 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 8000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

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Description

This 20-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVCH20T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH20T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)\ input can be used to disable the outputs so that the buses are effectively isolated.

The SN74AVCH20T245 is designed so that the control (1DIR, 2DIR, 1OE\, and 2OE\) inputs are supplied by VCCA.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature ensures that if either VCC input is at GND, both outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Technical documentation

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Type Title Date
* Datasheet SN74AVCH20T245 datasheet (Rev. F) Apr. 19, 2005
Selection guides Voltage translation buying guide Jun. 13, 2019
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
Application notes Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) Apr. 30, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application notes Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. A) Jul. 08, 2004
Application notes Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
More literature LCD Module Interface Application Clip May 09, 2003
User guides AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C) Aug. 20, 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards Jun. 13, 2002
Application notes 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) May 22, 2002
Application notes Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B) Jul. 07, 1999
Application notes AVC Logic Family Technology and Applications (Rev. A) Aug. 26, 1998

Design & development

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Design tools & simulation

SIMULATION MODELS Download
SCEM432A.ZIP (69 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
BGA MICROSTAR JUNIOR (ZQL) 56 View options
TSSOP (DGG) 56 View options
TVSOP (DGV) 56 View options

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