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SN74CB3T16210

ACTIVE

3.3-V, crosspoint/exchange, 20-channel FET bus switch with level shifter

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Data sheet

SN74CB3T16210

ACTIVE
Data sheet Order now

Product details

Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 100 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5 CON (typ) (pF) 13 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 9500 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 100 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 5.5 Operating temperature range (°C) -40 to 85 ESD CDM (kV) 1 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 5 CON (typ) (pF) 13 OFF-state leakage current (max) (µA) 10 Ron (max) (mΩ) 9500 VIH (min) (V) 1.7 VIL (max) (V) 0.8 Rating Catalog
TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm) TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm) SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm)
  • Member of the Texas Instruments Widebus Family
  • Output Voltage Translation Tracks VCC
  • Supports Mixed-Mode Signal Operation on All Data I/O Ports
    • 5-V Input Down to 3.3-V Output Level Shift With 3.3-V
      VCC
    • 5-V/3.3-V Input Down to 2.5-V Output Level Shift With 2.5-V
      VCC
  • 5-V-Tolerant I/Os With Device Powered Up or Powered Down
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics
    (ron = 5 Ω Typ)
  • Low Input/Output Capacitance Minimizes Loading
    (Cio(OFF) = 5 pF Typ)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption
    (ICC = 40 µA Max)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Digital Applications: Level Translation, PCI Interface, USB Interface,
    Memory Interleaving, and Bus Isolation
  • Ideal for Low-Power Portable Equipment

Widebus is a trademark of Texas Instruments.
  • Member of the Texas Instruments Widebus Family
  • Output Voltage Translation Tracks VCC
  • Supports Mixed-Mode Signal Operation on All Data I/O Ports
    • 5-V Input Down to 3.3-V Output Level Shift With 3.3-V
      VCC
    • 5-V/3.3-V Input Down to 2.5-V Output Level Shift With 2.5-V
      VCC
  • 5-V-Tolerant I/Os With Device Powered Up or Powered Down
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics
    (ron = 5 Ω Typ)
  • Low Input/Output Capacitance Minimizes Loading
    (Cio(OFF) = 5 pF Typ)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption
    (ICC = 40 µA Max)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0- to 5-V Signaling Levels
    (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Digital Applications: Level Translation, PCI Interface, USB Interface,
    Memory Interleaving, and Bus Isolation
  • Ideal for Low-Power Portable Equipment

Widebus is a trademark of Texas Instruments.

The SN74CB3T16210 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T16210 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see ).

The SN74CB3T16210 is organized as two 10-bit bus switches with separate ouput-enable (1OE, 2OE) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE is low, the associated 10-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 10-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CB3T16210 is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T16210 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see ).

The SN74CB3T16210 is organized as two 10-bit bus switches with separate ouput-enable (1OE, 2OE) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE is low, the associated 10-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 10-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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Top documentation Type Title Format options Date
* Data sheet SN74CB3T16210 datasheet (Rev. B) Jul 11, 2012
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML Jun 2, 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML Dec 1, 2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML Jan 6, 2021

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Simulation model

SN74CB3T16210 IBIS Model

SCDM076.ZIP (26 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TVSOP (DGV) 48 Ultra Librarian
TSSOP (DGG) 48 Ultra Librarian
SSOP (DL) 48 Ultra Librarian
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