SN74HC02-EP

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Enhanced product 4-ch, 2-input, 2-V to 6-V NOR gates

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Product details

Parameters

Technology Family HC Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Channels (#) 4 Inputs per channel 2 IOL (Max) (mA) 4 IOH (Max) (mA) -4 Input type Standard CMOS Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (Max) (Mbps) 28 Rating HiRel Enhanced Product Operating temperature range (C) -40 to 125 open-in-new Find other NOR gate

Package | Pins | Size

TSSOP (PW) 14 32 mm² 5 x 6.4 open-in-new Find other NOR gate

Features

  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of Up To –55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-V to 6-V VCC Operation
  • Outputs Can Drive Up To 10 LSTTL Loads
  • Low Power Consumption, 20-µA Max ICC
  • Typical tpd = 8 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max

Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

open-in-new Find other NOR gate

Description

The SN74HC02 contains four independent 2-input NOR gates. It performs the Boolean function Y = (A + B)\ or Y = A\ • B\ in positive logic.

open-in-new Find other NOR gate
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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet SN74HC02-EP datasheet (Rev. A) Jan. 06, 2004
* VID SN74HC02-EP VID V6204687 Jun. 21, 2016
* Radiation & reliability report SN74HC02QPWREP Reliability Report Sep. 05, 2013
Technical articles How to keep your motor running safely Jun. 04, 2020
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guide Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application note Designing With Logic (Rev. C) Jun. 01, 1997
Application note Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application note Live Insertion Oct. 01, 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions May 01, 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc Apr. 01, 1996

Design & development

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CAD/CAE symbols

Package Pins Download
TSSOP (PW) 14 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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