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SN74HC4066

ACTIVE

5-V, 2:1 (SPDT), 4-channel analog switch

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Data sheet

SN74HC4066

ACTIVE
Data sheet Order now

Product details

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 3 ON-state leakage current (max) (µA) 5 Supply current (typ) (µA) 2 Bandwidth (MHz) 30 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 6
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 30 CON (typ) (pF) 3 ON-state leakage current (max) (µA) 5 Supply current (typ) (µA) 2 Bandwidth (MHz) 30 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 6 Supply voltage (max) (V) 6
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8 SSOP (DB) 14 48.36 mm² 6.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4
  • Wide Operating Voltage Range of 2 V to 6 V
  • Typical Switch Enable Time of 18 ns
  • Low Power Consumption, 20-µA Maximum ICC
  • Low Input Current of 1 µA Maximum
  • High Degree of Linearity
  • High On-Off Output-Voltage Ratio
  • Low Crosstalk Between Switches
  • Low On-State Impedance: 50-Ω Typical at
    VCC = 6 V
  • Individual Switch Controls
  • Wide Operating Voltage Range of 2 V to 6 V
  • Typical Switch Enable Time of 18 ns
  • Low Power Consumption, 20-µA Maximum ICC
  • Low Input Current of 1 µA Maximum
  • High Degree of Linearity
  • High On-Off Output-Voltage Ratio
  • Low Crosstalk Between Switches
  • Low On-State Impedance: 50-Ω Typical at
    VCC = 6 V
  • Individual Switch Controls

The SN74HC4066 device is a silicon-gate CMOS quadruple analog switch designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 6 V (peak) to be transmitted in either direction.

Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

The SN74HC4066 device is a silicon-gate CMOS quadruple analog switch designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 6 V (peak) to be transmitted in either direction.

Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
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Technical documentation

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Type Title Date
* Data sheet SN74HC4066 quadruple bilateral analog switch datasheet (Rev. J) PDF | HTML 14 Mar 2019
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

User guide: PDF
Not available on TI.com
Package Pins Download
PDIP (N) 14 View options
SOIC (D) 14 View options
SOP (NS) 14 View options
SSOP (DB) 14 View options
TSSOP (PW) 14 View options
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