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SN74HCS125

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Schmitt-trigger inputs quadruple bus buffer gates with 3-state outputs

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Data sheet

SN74HCS125

ACTIVE
Data sheet Order now

Product details

Technology family HCS Number of channels 4 IOL (max) (mA) 7.8 Supply current (max) (µA) 2 IOH (max) (mA) -7.8 Input type Schmitt-Trigger Output type 3-State Features Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family HCS Number of channels 4 IOL (max) (mA) 7.8 Supply current (max) (µA) 2 IOH (max) (mA) -7.8 Input type Schmitt-Trigger Output type 3-State Features Balanced outputs, Input clamp diode, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) SOT-23-THN (DYY) 14 13.692 mm² (4.2 mm × 3.26 mm) WQFN (BQA) 14 7.5 mm² (3 mm × 2.5 mm)
  • Wide operating voltage range: 2V to 6V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100nA
    • Typical input leakage current of ±100 nA
  • ±7.8mA output drive at 6V
  • Extended ambient temperature range: –40°C to +125°C, TA
  • Wide operating voltage range: 2V to 6V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100nA
    • Typical input leakage current of ±100 nA
  • ±7.8mA output drive at 6V
  • Extended ambient temperature range: –40°C to +125°C, TA

The SN74HCS125 contains four independent buffers with 3-state outputs and Schmitt-trigger inputs. Each buffer performs the Boolean function Y = A in positive logic. The outputs can be put into a Hi-Z state by applying a High on the OE pin.

The SN74HCS125 contains four independent buffers with 3-state outputs and Schmitt-trigger inputs. Each buffer performs the Boolean function Y = A in positive logic. The outputs can be put into a Hi-Z state by applying a High on the OE pin.
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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74HCS125 Quadruple Buffer With 3-State Outputs and Schmitt-Trigger Inputs datasheet (Rev. D) PDF | HTML Mar 19, 2026
Application brief Using Linear Interpolation to Estimate Specification Values PDF | HTML Apr 13, 2026
Application brief Optimizing Board Space for Discrete LOGIC Designs Using Smallest Package Solutio (Rev. A) PDF | HTML Sep 29, 2022
Application brief Enabling Optimal Solar Inverter Power Stage Designs with Logic PDF | HTML Aug 17, 2021

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

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Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

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Simulation model

SN74HCS125 Behavioral SPICE Model

SCLM311.ZIP (10 KB) - PSpice model
Supported products & hardware
Simulation model

SN74HCS125 IBIS Model (Rev. B)

SCLM174B.ZIP (51 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
SOT-23-THN (DYY) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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