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SN74HCS126

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Schmitt-trigger inputs quadruple bus buffer gates with 3-state outputs

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Data sheet

SN74HCS126

ACTIVE
Data sheet Order now

Product details

Technology Family HCS Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Number of channels (#) 4 IOL (Max) (mA) 7.8 ICC (Max) (uA) 2 IOH (Max) (mA) -7.8 Input type Schmitt-Trigger Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns), Input clamp diode Rating Catalog
Technology Family HCS Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 6 Number of channels (#) 4 IOL (Max) (mA) 7.8 ICC (Max) (uA) 2 IOH (Max) (mA) -7.8 Input type Schmitt-Trigger Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns), Input clamp diode Rating Catalog
SOIC (D) 14 52 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA

This device contains four independent buffer with 3-state outputs and Schmitt-trigger inputs. Each gate performs the Boolean function Y = A in positive logic. The outputs can be put into a Hi-Z state by applying a Low on the OE pin

This device contains four independent buffer with 3-state outputs and Schmitt-trigger inputs. Each gate performs the Boolean function Y = A in positive logic. The outputs can be put into a Hi-Z state by applying a Low on the OE pin
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Technical documentation

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* Data sheet SN74HCS126 Quadruple Bus Buffer Gates with 3-State Outputs datasheet (Rev. A) 08 Mar 2021

Design & development

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Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

User guide: PDF | HTML
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Simulation model

SN74HCS126 Behavioral SPICE Model

SCLM312.ZIP (10 KB) - PSpice Model
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Simulation model

SN74HCS126 IBIS Model

SCLM175.ZIP (250 KB) - IBIS Model
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Package Pins Download
SOIC (D) 14 View options
TSSOP (PW) 14 View options

Ordering & quality

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