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SN74HCS126

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Schmitt-trigger inputs quadruple bus buffer gates with 3-state outputs

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Product details

Parameters

Technology Family HCS VCC (Min) (V) 2 VCC (Max) (V) 6 Channels (#) 4 IOL (Max) (mA) 7.8 ICC (Max) (uA) 2 IOH (Max) (mA) -7.8 Input type Schmitt-Trigger Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns), Input clamp diode Data rate (Mbps) 130 Rating Catalog open-in-new Find other Non-Inverting buffer/driver

Package | Pins | Size

SOIC (D) 14 52 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4 open-in-new Find other Non-Inverting buffer/driver

Features

  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 5 V
  • Extended ambient temperature range: –40°C to +125°C, TA

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Description

This device contains four independent buffer with 3-state outputs and Schmitt-trigger inputs. Each gate performs the Boolean function Y = A in positive logic. The outputs can be put into a Hi-Z state by applying a Low on the OE pin

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Technical documentation

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Type Title Date
* Datasheet SN74HCS126 Quadruple Buffer with 3-State Outputs and Schmitt-Trigger Inputs datasheet Jun. 24, 2020

Design & development

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Hardware development

EVALUATION BOARD Download
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

Design tools & simulation

SIMULATION MODEL Download
SCLM175.ZIP (250 KB) - IBIS Model
SIMULATION MODEL Download
SCLM312.ZIP (10 KB) - PSpice Model

CAD/CAE symbols

Package Pins Download
SOIC (D) 14 View options
TSSOP (PW) 14 View options

Ordering & quality

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