The HCT139 devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay time of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
The HCT139 devices comprise two individual 2-line to 4-line decoders in a single package. The active-low enable (G)\ input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit.
|Part number||Order||Function||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||Configuration||Type||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)||Package Group||Package size: mm2:W x L (PKG)||Bits (#)||Digital input leakage (Max) (uA)||ESD CDM (kV)||ESD HBM (kV)|
|HCT||4.5||5.5||2||5||25||0.08||43||2:4||Standard||4||-4||Catalog||-40 to 85||
PDIP | 16
SOIC | 16
SSOP | 16
TSSOP | 16
See datasheet (PDIP)
16SOIC: 59 mm2: 6 x 9.9 (SOIC | 16)
16SSOP: 48 mm2: 7.8 x 6.2 (SSOP | 16)
16TSSOP: 22 mm2: 4.4 x 5 (TSSOP | 16)