These 2-input open-collector NAND gates feature high-output voltage ratings for interfacing with low-threshold-voltage MOS logic circuits or other 12-volt systems. Although the output is rated to withstand 15 volts, the VCC terminal is connected to the standard 5-volt source.
The SN5426 and SN54LS26 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7426 and SN74LS26 are characterized for operation from 0°C to 70°C.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | Quadruple 2-Input High-Voltage Interface Positive-NAND Gates datasheet | 01 Mar 1988 | |
| Selection guide | Logic Guide (Rev. AB) | 12 Jun 2017 | ||
| More literature | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 02 Dec 2015 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 16 Jan 2007 | ||
| More literature | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 08 Jul 2004 | ||
| More literature | TI IBIS File Creation, Validation, and Distribution Processes | 29 Aug 2002 | ||
| More literature | Designing With Logic (Rev. C) | 01 Jun 1997 | ||
| More literature | Designing with the SN54/74LS123 (Rev. A) | 01 Mar 1997 | ||
| More literature | Input and Output Characteristics of Digital Integrated Circuits | 01 Oct 1996 | ||
| More literature | Live Insertion | 01 Oct 1996 |
For additional terms or required resources, click any title below to view the detail page where available.
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.
| Package | Pins | Download |
|---|---|---|
| PDIP (N) | 14 | View options |
| SOIC (D) | 14 | View options |
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