Product details

Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -15 Input type TTL Output type TTL Features High speed (tpd 10-50ns) Technology family LS Rating Catalog Operating temperature range (°C) 0 to 70
Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -15 Input type TTL Output type TTL Features High speed (tpd 10-50ns) Technology family LS Rating Catalog Operating temperature range (°C) 0 to 70
PDIP (N) 20 228.702 mm² 24.33 x 9.4
  • Bidirectional Bus Transceivers in High-Density 20-Pin Packages
  • Local Bus-Latch Capability
  • Hysteresis at Bus Inputs Improves Noise Margins
  • Choice of True or Inverting Logic
  • Choice of 3-State or Open-Collector Outputs

 

  • Bidirectional Bus Transceivers in High-Density 20-Pin Packages
  • Local Bus-Latch Capability
  • Hysteresis at Bus Inputs Improves Noise Margins
  • Choice of True or Inverting Logic
  • Choice of 3-State or Open-Collector Outputs

 

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing.

These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the enable inputs (G\BA and GAB).

The enable inputs can be used to disable the device so that the buses are effectively isolated.

The dual-enable configuration gives the 'LS620, 'LS621, and 'LS623 the capability to store data by simultaneous enabling of G\BA and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical for the 'LS621 and 'LS623 devices or complementary for the 'LS620.

 

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing.

These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus depending upon the logic levels at the enable inputs (G\BA and GAB).

The enable inputs can be used to disable the device so that the buses are effectively isolated.

The dual-enable configuration gives the 'LS620, 'LS621, and 'LS623 the capability to store data by simultaneous enabling of G\BA and GAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (16 in all) will remain at their last states. The 8-bit codes appearing on the two sets of buses will be identical for the 'LS621 and 'LS623 devices or complementary for the 'LS620.

 

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Technical documentation

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Type Title Date
* Data sheet Octal Bus Transceivers datasheet 01 Mar 1988
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Designing with the SN54/74LS123 (Rev. A) 01 Mar 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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PDIP (N) 20 Ultra Librarian

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