Product details

Technology Family LV-A Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Number of channels (#) 6 IOL (Max) (mA) 16 ICC (Max) (uA) 20 IOH (Max) (mA) 0 Input type Standard CMOS Output type Open-Drain Features Very high speed (tpd 5-10ns), Partial power down (Ioff), Over-voltage tolerant inputs Rating Catalog
Technology Family LV-A Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Number of channels (#) 6 IOL (Max) (mA) 16 ICC (Max) (uA) 20 IOH (Max) (mA) 0 Input type Standard CMOS Output type Open-Drain Features Very high speed (tpd 5-10ns), Partial power down (Ioff), Over-voltage tolerant inputs Rating Catalog
SOIC (D) 14 52 mm² 8.65 x 6 SOP (NS) 14 80 mm² 10.2 x 7.8 SSOP (DB) 14 48 mm² 6.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4 TVSOP (DGV) 14 23 mm² 3.6 x 6.4
  • 2-V to 5.5-V VCC Operation
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Outputs are Disabled During Power Up
    and Power Down With Inputs Tied to VCC
  • Support Mixed-Mode Voltage Operation
    on All Ports
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 200-V Machine Model
    • 1000-V Charged-Device Model
  • 2-V to 5.5-V VCC Operation
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Outputs are Disabled During Power Up
    and Power Down With Inputs Tied to VCC
  • Support Mixed-Mode Voltage Operation
    on All Ports
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 200-V Machine Model
    • 1000-V Charged-Device Model

These hex buffers/drivers are designed for 2-V to
5.5-V VCC operation.

The SN74LV07A device performs the Boolean function Y = A in positive logic.

These hex buffers/drivers are designed for 2-V to
5.5-V VCC operation.

The SN74LV07A device performs the Boolean function Y = A in positive logic.

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Technical documentation

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Type Title Date
* Data sheet SN74LV07A Hex Buffers/Drivers With Open-Drain Outputs datasheet (Rev. K) 10 Oct 2014
Technical article How to keep your motor running safely 04 Jun 2020

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

In stock
Limit: 5
Simulation model

SN74LV07A IBIS Model

SCEM464.ZIP (9 KB) - IBIS Model
Simulation model

SN74LV07A Behavioral SPICE Model

SCEM660.ZIP (7 KB) - PSpice Model
Package Pins Download
SO (NS) 14 View options
SOIC (D) 14 View options
SSOP (DB) 14 View options
TSSOP (PW) 14 View options
TVSOP (DGV) 14 View options

Ordering & quality

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  • Qualification summary
  • Ongoing reliability monitoring

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