The LV132A devices are quadruple positive-NAND gates designed for 2-V to 5.5-V VCC operation.
The LV132A devices perform the Boolean function Y = A B or Y = A + B in positive logic.
Each circuit functions as a NAND gate, but because of the Schmitt trigger, it has different input threshold levels for positive- and negative-going signals.
These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.
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|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||Inputs per channel||IOL (Max) (mA)||IOH (Max) (mA)||Input type||Output type||Features||Rating||Data rate (Max) (Mbps)||Operating temperature range (C)||Package size: mm2:W x L (PKG)||Package Group|
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
High Speed (tpd 10-50ns)
-40 to 125
-40 to 85
14SO: 80 mm2: 7.8 x 10.2 (SO | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)
14SSOP: 48 mm2: 7.8 x 6.2 (SSOP | 14)
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)
14TVSOP: 23 mm2: 6.4 x 3.6 (TVSOP | 14)
SOIC | 14
SO | 14
SSOP | 14
TSSOP | 14
TVSOP | 14