SN74LV21A

ACTIVE

Dual 4-Input Positive-AND Gate

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Product details

Parameters

Technology Family LV-A VCC (Min) (V) 2 VCC (Max) (V) 5.5 Channels (#) 2 Inputs per channel 4 IOL (Max) (mA) 12 IOH (Max) (mA) -12 Input type Standard CMOS Output type Push-Pull Features Partial Power Down (Ioff), Over-Voltage Tolerant Inputs, Very High Speed (tpd 5-10ns) Data rate (Max) (Mbps) 70 Rating Catalog Operating temperature range (C) -40 to 85 open-in-new Find other AND gate

Package | Pins | Size

SOIC (D) 14 52 mm² 8.65 x 6 SOP (NS) 14 80 mm² 10.2 x 7.8 SSOP (DB) 14 48 mm² 6.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4 TVSOP (DGV) 14 23 mm² 3.6 x 6.4 open-in-new Find other AND gate

Features

  • 2-V to 5.5-V VCC Operation
  • Max tpd of 6 ns at 5 V
  • Typical VOLP (Output Ground Bounce)
        <0.8 V at VCC, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
       >2.3 V at VCC, TA = 25°C
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
open-in-new Find other AND gate

Description

These dual 4-input positive-AND gates are designed for 2-V to 5.5-V VCC operation.

The 'LV21A devices perform the Boolean function Y = A • B 1 C • D or Y = (A\ + B\ + C\ + D\)\ in positive logic.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.

open-in-new Find other AND gate
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Technical documentation

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Type Title Date
* Datasheet SN54LV21A, SN74LV21A datasheet (Rev. E) Apr. 22, 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$10.00
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARDS Download
document-generic User guide
$1,999.00
Description

The DLP® LightCrafter™ 6500 is a high performance, yet flexible evaluation module for incorporating DLP technology into a wide variety light steering applications. This EVM is an easy path for those developing solutions requiring high resolution, optical throughput and brightness at a (...)

Features
  • Display images or video up to 1080p resolution (1920x1080 array)
  • High speed patterns using the DLPC900
    • Up to 9,523 Hz binary pattern rate
    • Up to 247 Hz 8-bit grayscale pattern rate
  • 2 Configurable I/O trigger for synchronizing with cameras, sensors, or other peripherals
  • USB 1.1, HDMI and I2C interfaces
  • (...)
EVALUATION BOARDS Download
document-generic User guide
$5,749.00
Description

The DLP® LightCrafter™ 9000 is a high performance and highly flexible development kit for incorporating DLP technology into a wide variety light steering applications. This EVM is an easy path for solutions maximizing resolution, optical throughput and brightness.

At the heart of DLP LightCrafter 9000 (...)

Features

DLP9000

  • Development- LightCrafter 9000 EVM
  • Maximum Bandwidth- >40 Gbps
  • Maximum Binary Pattern Rate- 9.5 kHZ
  • DLP Digital Controller-DLPC900
  • DLP PROM-DLPR900
  • Wavelength Range- 400-700 nm
  • Micromirror Array Size- 2560 x 1600
  • Display Resolution- WQXGA
  • Micromirror Array Diagonal- 0.9 inches
  • Micromirror Pixel Pitch (...)

CAD/CAE symbols

Package Pins Download
SO (NS) 14 View options
SOIC (D) 14 View options
SSOP (DB) 14 View options
TSSOP (PW) 14 View options
TVSOP (DGV) 14 View options

Ordering & quality

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