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SN74LV8T245

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Single-supply octal-translating transceiver with tri-state outputs

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Data sheet

SN74LV8T245

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Data sheet Order now

Product details

Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 8 IOH (max) (mA) -8 Input type TTL/CMOS Output type CMOS Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Technology family LV-A Rating Catalog Operating temperature range (°C) -40 to 125
Supply voltage (min) (V) 1.65 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 8 IOH (max) (mA) -8 Input type TTL/CMOS Output type CMOS Features Balanced outputs, Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Technology family LV-A Rating Catalog Operating temperature range (°C) -40 to 125
VQFN (RKS) 20 11.25 mm² 4.5 x 2.5
  • Wide operating range of 1.8 V to 5.5 V

  • Single-supply voltage translator (Refer to Section 8.3.3):

    • Up translation:

      • 1.2 V to 1.8 V
      • 1.5 V to 2.5 V
      • 1.8 V to 3.3 V
      • 3.3 V to 5.0 V

    • Down translation:

      • 5.0 V, 3.3 V, 2.5 V to 1.8 V
      • 5.0 V, 3.3 V to 2.5 V
      • 5.0 V to 3.3 V
  • 5.5 V tolerant input pins
  • Supports standard pinouts
  • Up to 150 Mbps with 5 V or 3.3 V VCC
  • Latch-up performance exceeds 250 mA per JESD 17
  • Wide operating range of 1.8 V to 5.5 V

  • Single-supply voltage translator (Refer to Section 8.3.3):

    • Up translation:

      • 1.2 V to 1.8 V
      • 1.5 V to 2.5 V
      • 1.8 V to 3.3 V
      • 3.3 V to 5.0 V

    • Down translation:

      • 5.0 V, 3.3 V, 2.5 V to 1.8 V
      • 5.0 V, 3.3 V to 2.5 V
      • 5.0 V to 3.3 V
  • 5.5 V tolerant input pins
  • Supports standard pinouts
  • Up to 150 Mbps with 5 V or 3.3 V VCC
  • Latch-up performance exceeds 250 mA per JESD 17

The SN74LV8T245 is an octal bus transceiver with 3-state outputs. All eight channels are controlled by the direction (DIR) pin and output enable (OE) pin. The output level is referenced to the supply voltage (VCC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).

The SN74LV8T245 is an octal bus transceiver with 3-state outputs. All eight channels are controlled by the direction (DIR) pin and output enable (OE) pin. The output level is referenced to the supply voltage (VCC) and supports 1.8-V, 2.5-V, 3.3-V, and 5-V CMOS levels.

The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example, 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example, 3.3 V to 2.5 V output).
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Technical documentation

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* Data sheet SN74LV8T245 8-Bit Transceiver with Integrated Level Translator datasheet 23 Dec 2022

Design & development

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Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

User guide: PDF | HTML
Not available on TI.com
Evaluation board

14-24-NL-LOGIC-EVM — Generic 14 through 24 pin non-leaded package evaluation module

Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74LV8T245 IBIS Model

SCLM353.ZIP (65 KB) - IBIS Model
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Package Pins Download
VQFN (RKS) 20 View options

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