SN74LVC00A-EP Enhanced Product Quadruple 2-Input Positive-Nand Gate | TI.com

SN74LVC00A-EP (ACTIVE)

Enhanced Product Quadruple 2-Input Positive-Nand Gate

Enhanced Product Quadruple 2-Input Positive-Nand Gate - SN74LVC00A-EP
Datasheet
 

Description

The SN74LVC00A quadruple 2-input positive-NAND gate is designed for 2.7-V to 3.6-V VCC operation.

The device performs the Boolean function Y = A • B or Y = A + B in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment.

Features

  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Extended Temperature Performance of -40°C to 125°C and -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Operates From 2 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.3 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

View more

Parametrics Compare all products in NAND gate

 
Technology Family
VCC (Min) (V)
VCC (Max) (V)
Channels (#)
Inputs per channel
IOL (Max) (mA)
IOH (Max) (mA)
Input type
Output type
Features
Rating
Data rate (Max) (Mbps)
Operating temperature range (C)
Package Group
Package size: mm2:W x L (PKG)
SN74LVC00A-EP SN54LVC00A SN74LVC00A SN74LVC00A-Q1
LVC     LVC     LVC     LVC    
2     2     1.65     2    
3.6     3.6     3.6     3.6    
4     4     4     4    
2     2     2     2    
24     24     24     24    
-24     -24     -24     -24    
Standard CMOS     Standard CMOS     Standard CMOS     Standard CMOS    
Push-Pull     Push-Pull     Push-Pull     Push-Pull    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
HiRel Enhanced Product     Military     Catalog     Automotive    
100     100     100     100    
-40 to 125
-55 to 125    
-55 to 125     -40 to 125     -40 to 125    
SOIC | 14
TSSOP | 14    
CDIP | 14
CFP | 14
LCCC | 20    
SOIC | 14
SO | 14
SSOP | 14
TSSOP | 14
VQFN | 14    
TSSOP | 14    
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)    
See datasheet (CDIP)
See datasheet (CFP)
20LCCC: 79 mm2: 8.89 x 8.89 (LCCC | 20)    
14SO: 80 mm2: 7.8 x 10.2 (SO | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)
14SSOP: 48 mm2: 7.8 x 6.2 (SSOP | 14)
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)
14VQFN: 12 mm2: 3.5 x 3.5 (VQFN | 14)    
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)