SN74LVC10A Triple 3-Input Positive-NAND Gate | TI.com

SN74LVC10A
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Triple 3-Input Positive-NAND Gate

Triple 3-Input Positive-NAND Gate - SN74LVC10A
Datasheet
 

Description

This triple 3-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation.

The SN74LVC10A performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

Features

  • Operates From 1.65 V to 3.6 V
  • Specified From -40°C to 85°C and -40°C to 125°C
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.9 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Inputs per channel IOL (Max) (mA) IOH (Max) (mA) Input type Output type Features Rating Data rate (Max) (Mbps) Operating temperature range (C) Package size: mm2:W x L (PKG) Package Group
SN74LVC10A Order now LVC     1.65     3.6     3     3     24     -24     Standard CMOS     Push-Pull     Partial Power Down (Ioff)
Over-Voltage Tolerant Inputs
Ultra High Speed (tpd <5ns)    
Catalog     100     -40 to 125     14SO: 80 mm2: 7.8 x 10.2 (SO | 14)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)
14SSOP: 48 mm2: 7.8 x 6.2 (SSOP | 14)
14TSSOP: 32 mm2: 6.4 x 5 (TSSOP | 14)
14VQFN: 12 mm2: 3.5 x 3.5 (VQFN | 14)    
SOIC | 14
SO | 14
SSOP | 14
TSSOP | 14
VQFN | 14