Product details

Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type TTL/CMOS Output type LVTTL Features Balanced outputs Technology family LVC Rating Catalog Operating temperature range (°C) -40 to 125
Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type TTL/CMOS Output type LVTTL Features Balanced outputs Technology family LVC Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm) SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) VQFN (RGY) 20 15.75 mm² (4.5 mm × 3.5 mm) SSOP (DB) 20 56.16 mm² (7.2 mm × 7.8 mm) PDIP (N) 20 228.702 mm² (24.33 mm × 9.4 mm) TVSOP (DGV) 20 32 mm² (5 mm × 6.4 mm) SOP (NS) 20 98.28 mm² (12.6 mm × 7.8 mm)
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 6.3 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Live Insertion, Partial-Power-Down
    Mode and Back Drive protection
  • Supports Mixed-Mode Signal Operation on All
    Ports (5-V Input/Output Voltage With 3.3-V VCC)
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 6.3 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Ioff Supports Live Insertion, Partial-Power-Down
    Mode and Back Drive protection
  • Supports Mixed-Mode Signal Operation on All
    Ports (5-V Input/Output Voltage With 3.3-V VCC)
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 1000-V Charged-Device Model

These octal bus transceivers are designed for 1.65-V to 3.6-V VCC operation. The ’LVC245A devices are designed for asynchronous communication between data buses.

These octal bus transceivers are designed for 1.65-V to 3.6-V VCC operation. The ’LVC245A devices are designed for asynchronous communication between data buses.

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Technical documentation

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Top documentation Type Title Format options Date
* Data sheet SN74LVC245A Octal Bus Transceiver With 3-State Outputs datasheet (Rev. X) PDF | HTML Jan 25, 2015
Selection guide Logic Guide (Rev. AC) PDF | HTML Nov 13, 2025

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

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Simulation model

HSPICE MODEL OF SN74LVC245A

SCEJ191.ZIP (110 KB) - HSpice model
Supported products & hardware
Simulation model

IBIS Model of SN74LVC245A (Rev. D)

SCAM006A (214 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 20 Ultra Librarian
SOIC (DW) 20 Ultra Librarian
VQFN (RGY) 20 Ultra Librarian
SSOP (DB) 20 Ultra Librarian
PDIP (N) 20 Ultra Librarian
TVSOP (DGV) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian

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