These octal transceivers are designed specifically for low-voltage
(3.3-V) VCC operation, but with the capability to provide
a TTL interface to a 5-V system environment.
The 'LVT543 contain two sets of D-type latches for temporary
storage of data flowing in either direction. Separate latch-enable
(or) and output-enable(or) inputs are
provided for each register to permit independent control in either
direction of data flow.
The A-to-B enable ()
input must be low in order to enter data from A or to output data
from B. If is low and
is low, the
A-to-B latches are transparent; a subsequent low-to-high transition
of puts the A
latches in the storage mode. With and both low, the
3-state B outputs are active and reflect the data present at the
output of the A latches. Data flow from B to A is similar but
requires using the ,, and inputs.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
To ensure the high-impedance state during power up or power down,
should be tied
to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the
The SN74LVT543 is available in TI's shrink small-outline package
(DB), which provides the same I/O pin count and functionality of
standard small-outline packages in less than half the
The SN54LVT543 is characterized for operation over the full
military temperature range of -55°C to 125°C. The
SN74LVT543 is characterized for operation from -40°C to