SN74LVTH162244

ACTIVE

3.3.-V ABT 16-Bit Buffers/Drivers With 3-State Outputs

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3.3.-V ABT 16-Bit Buffers/Drivers With 3-State Outputs

SN74LVTH162244

ACTIVE

Product details

Parameters

Technology Family LVT VCC (Min) (V) 2.7 VCC (Max) (V) 3.6 Channels (#) 16 IOL (Max) (mA) 12 ICC (Max) (uA) 5000 IOH (Max) (mA) -12 Input type TTL-Compatible CMOS Output type 3-State Features Balanced outputs, Ultra high speed (tpd <5ns), Partial power down (Ioff), Over-voltage tolerant inputs, Power up 3-state, Bus-hold Data rate (Mbps) 320 Rating Catalog open-in-new Find other Non-Inverting buffer/driver

Package | Pins | Size

SSOP (DL) 48 164 mm² 15.88 x 10.35 TSSOP (DGG) 48 101 mm² 12.5 x 8.1 open-in-new Find other Non-Inverting buffer/driver

Features

  • Members of the Texas Instruments Widebus™ Family
  • Output Ports Have Equivalent 22- Series Resistors, So No External Resistors Are Required
  • Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
  • Support Unregulated Battery Operation Down to 2.7 V
  • Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

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Description

The 'LVTH162244 devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE) inputs.

The outputs, which are designed to source or sink up to 12 mA, include equivalent 22- series resistors to reduce overshoot and undershoot.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet SN54LVTH162244; SN74LVTH162244 datasheet (Rev. N) Nov. 01, 2006
Application notes An Overview of Bus-Hold Circuit and the Applications (Rev. B) Sep. 17, 2018
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) May 22, 2002
Application notes Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices May 10, 2002
More literature Military Low Voltage Solutions Apr. 04, 2001
Selection guides Advanced Bus Interface Logic Selection Guide Jan. 09, 2001
Application notes LVT-to-LVTH Conversion Dec. 08, 1998
Application notes LVT Family Characteristics (Rev. A) Mar. 01, 1998
Application notes Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes Understanding Advanced Bus-Interface Products Design Guide May 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Design tools & simulation

SIMULATION MODELS Download
SCBM110.ZIP (7 KB) - PSpice Model
SIMULATION MODELS Download
SCEJ245.ZIP (111 KB) - HSpice Model
SIMULATION MODELS Download
SCEM062D.ZIP (33 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
BGA MICROSTAR JUNIOR (ZQL) 56 View options
BGA MICROSTAR JUNIOR (ZRD) 54 View options
SSOP (DL) 48 View options
TSSOP (DGG) 48 View options

Ordering & quality

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