Product details

Technology Family LVT Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Number of channels (#) 6 IOL (Max) (mA) 12 IOH (Max) (mA) -12 ICC (Max) (uA) 20 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Unbuffered Rating Catalog
Technology Family LVT Supply voltage (Min) (V) 2 Supply voltage (Max) (V) 5.5 Number of channels (#) 6 IOL (Max) (mA) 12 IOH (Max) (mA) -12 ICC (Max) (uA) 20 Input type Standard CMOS Output type Push-Pull Features Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs, Unbuffered Rating Catalog
SOIC (D) 14 52 mm² 8.65 x 6 SOP (NS) 14 80 mm² 10.2 x 7.8 SSOP (DB) 14 48 mm² 6.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4
  • 2-V to 5.5-V VCC Operation
  • Unbuffered Outputs
  • Max tpd of 6.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
       >2.3 V at VCC = 3.3 V, TA = 25°C
  • Supports Mixed-Mode Voltage Operation on All Ports
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

  • 2-V to 5.5-V VCC Operation
  • Unbuffered Outputs
  • Max tpd of 6.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce)
       <0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
       >2.3 V at VCC = 3.3 V, TA = 25°C
  • Supports Mixed-Mode Voltage Operation on All Ports
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

These hex inverters are designed for 2-V to 5.5-V VCC operation.

The ’LVU04A devices contain six independent inverters with unbuffered outputs. These devices perform the Boolean function Y = A\.

These hex inverters are designed for 2-V to 5.5-V VCC operation.

The ’LVU04A devices contain six independent inverters with unbuffered outputs. These devices perform the Boolean function Y = A\.

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Technical documentation

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* Data sheet SN54LVU04A, SN74LVU04A datasheet (Rev. L) 02 Dec 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, P, N, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
In stock
Limit: 5
Evaluation board

14-24-NL-LOGIC-EVM — Generic 14 through 24 pin non-leaded package evaluation module

Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
In stock
Limit: 10
Simulation model

SN74LVU04A IBIS Model (Rev. A)

SCEM150A.ZIP (20 KB) - IBIS Model
Simulation model

SN74LVU04A Behavioral SPICE Model

SCEM597.ZIP (7 KB) - PSpice Model
Package Pins Download
SO (NS) 14 View options
SOIC (D) 14 View options
SSOP (DB) 14 View options
TSSOP (PW) 14 View options

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  • Ongoing reliability monitoring

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