Automotive 8-bit dual-supply wide voltage level translating transceiver with tri-state output



Product details


Technology Family LXC Applications GPIO, UART, SPI, JTAG Bits (#) 8 High input voltage (Min) (Vih) 0.44 High input voltage (Max) (Vih) 5.5 Vout (Min) (V) 1.1 Vout (Max) (V) 5.5 IOH (Max) (mA) -32 IOL (Max) (mA) 32 Rating Automotive open-in-new Find other Direction-controlled voltage translators

Package | Pins | Size

TSSOP (PW) 24 34 mm² 7.7 x 4.4 VQFN (RHL) 24 19 mm² 5.5 x 3.5 open-in-new Find other Direction-controlled voltage translators


  • AEC-Q100 Qualified for Automotive Applications
  • Fully Configurable Dual-Rail Design Allows Each Port to Operate from 1.1 V to 5.5 V
  • Robust, Glitch-Free Power Supply Sequencing
  • Up to 420-Mbps Support for 3.3 V to 5.0 V
  • Schmitt-Trigger Inputs Allow for Slow or Noisy Inputs
  • I/O’s with Integrated Dynamic Pull-Down Resistors Help Reduce External Component Count
  • Control Inputs with Integrated Static Pull-Down Resistors Allow for Floating Control Inputs
  • High Drive Strength (up to 32 mA at 5 V)
  • Low Power Consumption
    • 4-µA Maximum (25°C)
    • 12-µA Maximum (–40°C to 125°C)
  • VCC Isolation and VCC Disconnect (Ioff-float) Feature
    • If Either VCC Supply is < 100 mV or Disconnected, All I/O’s Get Pulled-Down and Then Become High-Impedance
  • Ioff Supports Partial-Power-Down Mode Operation
  • Compatible with LVC Family Level Shifters
  • Control Logic (DIR and OE) are Referenced to VCCA
  • Operating Temperature from –40°C to +125°C
  • Latch-Up Performance Exceeds 100 mA per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 4000-V Human-Body Model
    • 1000-V Charged-Device Model
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The SN74LXC8T245-Q1 is an 8-bit, dual-supply noninverting bidirectional voltage level translation device. Ax pins and control pins (DIR and OE) are referenced to VCCA logic levels, and Bx pins are referenced to VCCB logic levels. The A port is able to accept I/O voltages ranging from 1.1 V to 5.5 V, while the B port can accept I/O voltages from 1.1 V to 5.5 V. A high on DIR allows data transmission from A to B and a low on DIR allows data transmission from B to A when OE is set to low. When OE is set to high, both Ax and Bx pins are in the high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

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Technical documentation

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Type Title Date
* Data sheet SN74LXC8T245-Q1 Automotive 8-bit Dual-Supply Bus Transceiver with Configurable Level Shifting and 3-State Outputs datasheet (Rev. A) Nov. 24, 2020
Application note Robust Power Sequencing with LXC Family Jun. 29, 2021
Application note Bringing Together 5G Signal Chains With Level Translation Mar. 05, 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

document-generic User guide
Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic and translation devices with included dual supply support
  • Board has 9 sections that can be broken apart for a smaller form factor
document-generic User guide

The generic EVM is designed to support one, two, four and eight channel LVC and AVC direction-controlled translation devices. It also supports the bus hold and automotive -Q1 devices in the same number of channels. The AVC are low voltage translation devices with lower drive strength of 12mA. LVC is (...)

  • SMB connector available for high speed operation
  • Ground port available on each header pin to maintain signal integrity
  • DIR and OE have 10K ohm pull up /pull down resistor options
  • Designed to support up to 20 different devices

Design tools & simulation

SCEM783A.ZIP (57 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
TSSOP (PW) 24 View options
VQFN (RHL) 24 View options

Ordering & quality

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