TMS320DM6437Q

ACTIVE

Product details

DSP 1 C64x DSP MHz (Max) 400, 500, 600, 660, 700 CPU 32-/64-bit Ethernet MAC 10/100 Rating Automotive Operating temperature range (C) -40 to 125
DSP 1 C64x DSP MHz (Max) 400, 500, 600, 660, 700 CPU 32-/64-bit Ethernet MAC 10/100 Rating Automotive Operating temperature range (C) -40 to 125
BGA (ZDU) 376 529 mm² 23 x 23 NFBGA (ZWT) 361 256 mm² 16 x 16
  • Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. REQUEST FREE SOFTWARE!
  • High-Performance Digital Media Processor (DM6437)
    • 2.5-, 2-, 1.67, 1.51-, 1.43-ns Instruction Cycle Time
    • 400-, 500-, 600-, 660-, 700-MHz C64x+™ Clock Rate
    • Eight 32-Bit C64x+ Instructions/Cycle
    • 3200, 4000, 4800, 5280, 5600 MIPS
    • Fully Software-Compatible With C64x
    • Commercial and Automotive (Q or S suffix) Grades
    • Low-Power Device (L suffix)
  • VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word VLIW) TMS320C64x+™ DSP Core
    • Eight Highly Independent Functional Units With VelociTI.2 Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 × 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 × 8-Bit Multiplies (16-Bit Results) per Clock Cycle
  • Load-Store Architecture With Non-Aligned Support
  • 64 32-Bit General-Purpose Registers
  • Instruction Packing Reduces Code Size
  • All Instructions Conditional
  • Additional C64x+™ Enhancements
    • Protected Mode Operation
    • Exceptions Support for Error Detection and Program Redirection
    • Hardware Support for Modulo Loop Auto-Focus Module Operation
  • C64x+ Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2 Increased Orthogonality
    • C64x+ Extensions
      • Compact 16-bit Instructions
      • Additional Instructions to Support Complex Multiplies
  • C64x+ L1/L2 Memory Architecture
    • 256K-Bit (32K-Byte) L1P Program RAM/Cache [Flexible Allocation]
    • 640K-Bit (80K-Byte) L1D Data RAM/Cache [Flexible Allocation]
    • 1M-Bit (128K-Byte) L2 Unified Mapped RAM/Cache [Flexible Allocation]
  • Supports Little Endian Mode Only
  • Video Processing Subsystem (VPSS)
    • Front End Provides:
      • CCD and CMOS Imager Interface
      • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
      • Preview Engine for Real-Time Image Processing
      • Glueless Interface to Common Video Decoders
      • Histogram Module
      • Auto-Exposure, Auto-White Balance and Auto-Focus Module
      • Resize Engine
        • Resize Images From 1/4× to 4×
        • Separate Horizontal/Vertical Control
    • Back End Provides:
      • Hardware On-Screen Display (OSD)
      • Four 54-MHz DACs for a Combination of
        • Composite NTSC/PAL Video
        • Luma/Chroma Separate Video (S-video)
        • Component (YPbPr or RGB) Video (Progressive)
      • Digital Output
        • 8-/16-bit YUV or up to 24-Bit RGB
        • HD Resolution
        • Up to 2 Video Windows
  • External Memory Interfaces (EMIFs)
    • 32-Bit DDR2 SDRAM Memory Controller With 256M-Byte Address Space (1.8-V I/O)
      • Supports up to 333-MHz (data rate) Bus and Interfaces With DDR2-400 SDRAM
    • Asynchronous 8-Bit Wide EMIF (EMIFA) With up to 64M-Byte Address Reach
      • Flash Memory Interfaces
        • NOR (8-Bit-Wide Data)
        • NAND (8-Bit-Wide Data)
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • Two 64-Bit General-Purpose Timers (Each Configurable as Two 32-Bit Timers)
  • One 64-Bit Watch Dog Timer
  • Two UARTs (One with RTS and CTS Flow Control)
  • Master/Slave Inter-Integrated Circuit (I2C Bus×)
  • Two Multichannel Buffered Serial Ports (McBSPs)
    • I2S and TDM
    • AC97 Audio Codec Interface
    • SPI
    • Standard Voice Codec Interface (AIC12)
    • Telecom Interfaces - ST-Bus, H-100
    • 128 Channel Mode
  • Multichannel Audio Serial Port (McASP0)
    • Four Serializers and SPDIF (DIT) Mode
  • 16-Bit Host-Port Interface (HPI)
  • High-End CAN Controller (HECC)
  • 32-Bit 33-MHz, 3.3-V Peripheral Component Interconnect (PCI) Master/Slave Interface
  • 10/100 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Supports Media Independent Interface (MII)
    • Management Data I/O (MDIO) Module
  • VLYNQ™ Interface (FPGA Interface)
  • Three Pulse Width Modulator (PWM) Outputs
  • On-Chip ROM Bootloader
  • Individual Power-Savings Modes
  • Flexible PLL Clock Generators
  • IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
  • Up to 111 General-Purpose I/O (GPIO) Pins (Multiplexed With Other Device Functions)
  • Packages:
    • 361-Pin Pb-Free PBGA Package (ZWT Suffix), 0.8-mm Ball Pitch
    • 376-Pin Plastic BGA Package (ZDU Suffix), 1.0-mm Ball Pitch
  • 0.09-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V and 1.8-V I/O, 1.2-V Internal (-7/-6/-5/-4/-L/-Q6/-5Q/-4Q)
  • 3.3-V and 1.8-V I/O, 1.05-V Internal (-7/-6/-5/-4/-L/-Q5)
  • Applications
    • Digital Media
    • Networked Media Encode/Decode
    • Video Imaging

All trademarks are the property of their respective owners.

  • Get started today with production-ready, easy-to-use audio and video codecs for digital media processors based on DaVinci™ technology. Also available are various O/S Board Support Packages and software updates. All codecs are available for FREE evaluation. REQUEST FREE SOFTWARE!
  • High-Performance Digital Media Processor (DM6437)
    • 2.5-, 2-, 1.67, 1.51-, 1.43-ns Instruction Cycle Time
    • 400-, 500-, 600-, 660-, 700-MHz C64x+™ Clock Rate
    • Eight 32-Bit C64x+ Instructions/Cycle
    • 3200, 4000, 4800, 5280, 5600 MIPS
    • Fully Software-Compatible With C64x
    • Commercial and Automotive (Q or S suffix) Grades
    • Low-Power Device (L suffix)
  • VelociTI.2™ Extensions to VelociTI™ Advanced Very-Long-Instruction-Word VLIW) TMS320C64x+™ DSP Core
    • Eight Highly Independent Functional Units With VelociTI.2 Extensions:
      • Six ALUs (32-/40-Bit), Each Supports Single 32-Bit, Dual 16-Bit, or Quad 8-Bit Arithmetic per Clock Cycle
      • Two Multipliers Support Four 16 × 16-Bit Multiplies (32-Bit Results) per Clock Cycle or Eight 8 × 8-Bit Multiplies (16-Bit Results) per Clock Cycle
  • Load-Store Architecture With Non-Aligned Support
  • 64 32-Bit General-Purpose Registers
  • Instruction Packing Reduces Code Size
  • All Instructions Conditional
  • Additional C64x+™ Enhancements
    • Protected Mode Operation
    • Exceptions Support for Error Detection and Program Redirection
    • Hardware Support for Modulo Loop Auto-Focus Module Operation
  • C64x+ Instruction Set Features
    • Byte-Addressable (8-/16-/32-/64-Bit Data)
    • 8-Bit Overflow Protection
    • Bit-Field Extract, Set, Clear
    • Normalization, Saturation, Bit-Counting
    • VelociTI.2 Increased Orthogonality
    • C64x+ Extensions
      • Compact 16-bit Instructions
      • Additional Instructions to Support Complex Multiplies
  • C64x+ L1/L2 Memory Architecture
    • 256K-Bit (32K-Byte) L1P Program RAM/Cache [Flexible Allocation]
    • 640K-Bit (80K-Byte) L1D Data RAM/Cache [Flexible Allocation]
    • 1M-Bit (128K-Byte) L2 Unified Mapped RAM/Cache [Flexible Allocation]
  • Supports Little Endian Mode Only
  • Video Processing Subsystem (VPSS)
    • Front End Provides:
      • CCD and CMOS Imager Interface
      • BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
      • Preview Engine for Real-Time Image Processing
      • Glueless Interface to Common Video Decoders
      • Histogram Module
      • Auto-Exposure, Auto-White Balance and Auto-Focus Module
      • Resize Engine
        • Resize Images From 1/4× to 4×
        • Separate Horizontal/Vertical Control
    • Back End Provides:
      • Hardware On-Screen Display (OSD)
      • Four 54-MHz DACs for a Combination of
        • Composite NTSC/PAL Video
        • Luma/Chroma Separate Video (S-video)
        • Component (YPbPr or RGB) Video (Progressive)
      • Digital Output
        • 8-/16-bit YUV or up to 24-Bit RGB
        • HD Resolution
        • Up to 2 Video Windows
  • External Memory Interfaces (EMIFs)
    • 32-Bit DDR2 SDRAM Memory Controller With 256M-Byte Address Space (1.8-V I/O)
      • Supports up to 333-MHz (data rate) Bus and Interfaces With DDR2-400 SDRAM
    • Asynchronous 8-Bit Wide EMIF (EMIFA) With up to 64M-Byte Address Reach
      • Flash Memory Interfaces
        • NOR (8-Bit-Wide Data)
        • NAND (8-Bit-Wide Data)
  • Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
  • Two 64-Bit General-Purpose Timers (Each Configurable as Two 32-Bit Timers)
  • One 64-Bit Watch Dog Timer
  • Two UARTs (One with RTS and CTS Flow Control)
  • Master/Slave Inter-Integrated Circuit (I2C Bus×)
  • Two Multichannel Buffered Serial Ports (McBSPs)
    • I2S and TDM
    • AC97 Audio Codec Interface
    • SPI
    • Standard Voice Codec Interface (AIC12)
    • Telecom Interfaces - ST-Bus, H-100
    • 128 Channel Mode
  • Multichannel Audio Serial Port (McASP0)
    • Four Serializers and SPDIF (DIT) Mode
  • 16-Bit Host-Port Interface (HPI)
  • High-End CAN Controller (HECC)
  • 32-Bit 33-MHz, 3.3-V Peripheral Component Interconnect (PCI) Master/Slave Interface
  • 10/100 Mb/s Ethernet MAC (EMAC)
    • IEEE 802.3 Compliant
    • Supports Media Independent Interface (MII)
    • Management Data I/O (MDIO) Module
  • VLYNQ™ Interface (FPGA Interface)
  • Three Pulse Width Modulator (PWM) Outputs
  • On-Chip ROM Bootloader
  • Individual Power-Savings Modes
  • Flexible PLL Clock Generators
  • IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
  • Up to 111 General-Purpose I/O (GPIO) Pins (Multiplexed With Other Device Functions)
  • Packages:
    • 361-Pin Pb-Free PBGA Package (ZWT Suffix), 0.8-mm Ball Pitch
    • 376-Pin Plastic BGA Package (ZDU Suffix), 1.0-mm Ball Pitch
  • 0.09-µm/6-Level Cu Metal Process (CMOS)
  • 3.3-V and 1.8-V I/O, 1.2-V Internal (-7/-6/-5/-4/-L/-Q6/-5Q/-4Q)
  • 3.3-V and 1.8-V I/O, 1.05-V Internal (-7/-6/-5/-4/-L/-Q5)
  • Applications
    • Digital Media
    • Networked Media Encode/Decode
    • Video Imaging

All trademarks are the property of their respective owners.

The TMS320C64x+™ DSPs (including the TMS320DM6437 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The DM6437 device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x+™ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform. The C64x™ DSPs support added functionality and have an expanded instruction set from previous devices.

Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.

With performance of up to 4800 million instructions per second (MIPS) at a clock rate of 600 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units-two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in video and imaging applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2400 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4800 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).

The DM6437 also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000 DSP platform devices. The DM6437 core uses a two-level cache-based architecture. The Level 1 program memory/cache (L1P) consists of a 256K-bit memory space that can be configured as mapped memory or direct mapped cache, and the Level 1 data (L1D) consists of a 640K-bit memory space-384K-bit of which is mapped memory and 256K-bit of which can be configured as mapped memory or 2-way set-associative cache. The Level 2 memory/cache (L2) consists of a 1M-bit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two.

The peripheral set includes: 2 configurable video ports; a 10/100 Mb/s Ethernet MAC (EMAC) with a management data input/output (MDIO) module; a 4-bit transmit, 4-bit receive VLYNQ interface; an inter-integrated circuit (I2C) Bus interface; two multichannel buffered serial ports (McBSPs); a multichannel audio serial port (McASP0) with 4 serializers; 2 64-bit general-purpose timers each configurable as 2 independent 32-bit timers; 1 64-bit watchdog timer; a user-configurable 16-bit host-port interface (HPI); up to 111-pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; 2 UARTs with hardware handshaking support on 1 UART; 3 pulse width modulator (PWM) peripherals; 1 high-end controller area network (CAN) controller [HECC]; 1 peripheral component interconnect (PCI) [33 MHz]; and 2 glueless external memory interfaces: an asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher speed synchronous memory interface for DDR2.

The DM6437 device includes a Video Processing Subsystem (VPSS) with two configurable video/imaging peripherals: 1 Video Processing Front-End (VPFE) input used for video capture, 1 Video Processing Back-End (VPBE) output.

The Video Processing Front-End (VPFE) is comprised of a CCD Controller (CCDC), a Preview Engine (Previewer), Histogram Module, Auto-Exposure/White Balance/Focus Module (H3A), and Resizer. The CCDC is capable of interfacing to common video decoders, CMOS sensors, and Charge Coupled Devices (CCDs). The Previewer is a real-time image processing engine that takes raw imager data from a CMOS sensor or CCD and converts from an RGB Bayer Pattern to YUV422. The Histogram and H3A modules provide statistical information on the raw color data for use by the DM6437. The Resizer accepts image data for separate horizontal and vertical resizing from 1/4x to 4x in increments of 256/N, where N is between 64 and 1024.

The Video Processing Back-End (VPBE) is comprised of an On-Screen Display Engine (OSD) and a Video Encoder (VENC). The OSD engine is capable of handling 2 separate video windows and 2 separate OSD windows. Other configurations include 2 video windows, 1 OSD window, and 1 attribute window allowing up to 8 levels of alpha blending. The VENC provides four analog DACs that run at 54 MHz, providing a means for composite NTSC/PAL video, S-Video, and/or Component video output. The VENC also provides up to 24 bits of digital output to interface to RGB888 devices. The digital output is capable of 8/16-bit BT.656 output and/or CCIR.601 with separate horizontal and vertical syncs.

The Ethernet Media Access Controller (EMAC) provides an efficient interface between the DM6437 and the network. The DM6437 EMAC support both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps in either half- or full-duplex mode, with hardware flow control and quality of service (QOS) support.

The Management Data Input/Output (MDIO) module continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system.

The I2C and VLYNQ ports allow DM6437 to easily control peripheral devices and/or communicate with host processors.

The high-end controller area network (CAN) controller [HECC] module provides a network protocol in a harsh environment to communicate serially with other controllers, typically in automotive applications.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.

The DM6437 has a complete set of development tools. These include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code

The TMS320C64x+™ DSPs (including the TMS320DM6437 device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The DM6437 device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for digital media applications. The C64x+™ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform. The C64x™ DSPs support added functionality and have an expanded instruction set from previous devices.

Any reference to the C64x DSP or C64x CPU also applies, unless otherwise noted, to the C64x+ DSP and C64x+ CPU, respectively.

With performance of up to 4800 million instructions per second (MIPS) at a clock rate of 600 MHz, the C64x+ core offers solutions to high-performance DSP programming challenges. The DSP core possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. The C64x+ DSP core processor has 64 general-purpose registers of 32-bit word length and eight highly independent functional units-two multipliers for a 32-bit result and six arithmetic logic units (ALUs). The eight functional units include instructions to accelerate the performance in video and imaging applications. The DSP core can produce four 16-bit multiply-accumulates (MACs) per cycle for a total of 2400 million MACs per second (MMACS), or eight 8-bit MACs per cycle for a total of 4800 MMACS. For more details on the C64x+ DSP, see the TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (literature number SPRU732).

The DM6437 also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals similar to the other C6000 DSP platform devices. The DM6437 core uses a two-level cache-based architecture. The Level 1 program memory/cache (L1P) consists of a 256K-bit memory space that can be configured as mapped memory or direct mapped cache, and the Level 1 data (L1D) consists of a 640K-bit memory space-384K-bit of which is mapped memory and 256K-bit of which can be configured as mapped memory or 2-way set-associative cache. The Level 2 memory/cache (L2) consists of a 1M-bit memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two.

The peripheral set includes: 2 configurable video ports; a 10/100 Mb/s Ethernet MAC (EMAC) with a management data input/output (MDIO) module; a 4-bit transmit, 4-bit receive VLYNQ interface; an inter-integrated circuit (I2C) Bus interface; two multichannel buffered serial ports (McBSPs); a multichannel audio serial port (McASP0) with 4 serializers; 2 64-bit general-purpose timers each configurable as 2 independent 32-bit timers; 1 64-bit watchdog timer; a user-configurable 16-bit host-port interface (HPI); up to 111-pins of general-purpose input/output (GPIO) with programmable interrupt/event generation modes, multiplexed with other peripherals; 2 UARTs with hardware handshaking support on 1 UART; 3 pulse width modulator (PWM) peripherals; 1 high-end controller area network (CAN) controller [HECC]; 1 peripheral component interconnect (PCI) [33 MHz]; and 2 glueless external memory interfaces: an asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher speed synchronous memory interface for DDR2.

The DM6437 device includes a Video Processing Subsystem (VPSS) with two configurable video/imaging peripherals: 1 Video Processing Front-End (VPFE) input used for video capture, 1 Video Processing Back-End (VPBE) output.

The Video Processing Front-End (VPFE) is comprised of a CCD Controller (CCDC), a Preview Engine (Previewer), Histogram Module, Auto-Exposure/White Balance/Focus Module (H3A), and Resizer. The CCDC is capable of interfacing to common video decoders, CMOS sensors, and Charge Coupled Devices (CCDs). The Previewer is a real-time image processing engine that takes raw imager data from a CMOS sensor or CCD and converts from an RGB Bayer Pattern to YUV422. The Histogram and H3A modules provide statistical information on the raw color data for use by the DM6437. The Resizer accepts image data for separate horizontal and vertical resizing from 1/4x to 4x in increments of 256/N, where N is between 64 and 1024.

The Video Processing Back-End (VPBE) is comprised of an On-Screen Display Engine (OSD) and a Video Encoder (VENC). The OSD engine is capable of handling 2 separate video windows and 2 separate OSD windows. Other configurations include 2 video windows, 1 OSD window, and 1 attribute window allowing up to 8 levels of alpha blending. The VENC provides four analog DACs that run at 54 MHz, providing a means for composite NTSC/PAL video, S-Video, and/or Component video output. The VENC also provides up to 24 bits of digital output to interface to RGB888 devices. The digital output is capable of 8/16-bit BT.656 output and/or CCIR.601 with separate horizontal and vertical syncs.

The Ethernet Media Access Controller (EMAC) provides an efficient interface between the DM6437 and the network. The DM6437 EMAC support both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) and 100 Mbps in either half- or full-duplex mode, with hardware flow control and quality of service (QOS) support.

The Management Data Input/Output (MDIO) module continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system.

The I2C and VLYNQ ports allow DM6437 to easily control peripheral devices and/or communicate with host processors.

The high-end controller area network (CAN) controller [HECC] module provides a network protocol in a harsh environment to communicate serially with other controllers, typically in automotive applications.

The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.

The DM6437 has a complete set of development tools. These include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™ debugger interface for visibility into source code

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This data sheet applies to both  TMS320DM6437Q and  TMS320DM6437Q

Technical documentation

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Type Title Date
* Data sheet TMS320DM6437 Digital Media Processor datasheet (Rev. D) 06 Jun 2008
* Errata TMS320DM6437/35/33/31 DMP Silicon Errata (Revs. 1.3 1.2 1.1 & 1.0) (Rev. E) 12 Aug 2011
Application note Plastic Ball Grid Array [PBGA] Application Note (Rev. B) 13 Aug 2015
User guide TMS320C6000 Assembly Language Tools v 7.4 User's Guide (Rev. W) 21 Aug 2012
User guide TMS320C6000 Optimizing Compiler v 7.4 User's Guide (Rev. U) 21 Aug 2012
Application note Using the TMS320DM643x Bootloader (Rev. E) 23 Mar 2012
User guide TMS320C6000 Programmer's Guide (Rev. K) 11 Jul 2011
User guide TMS320DM643x DMP Inter-Integrated Circuit (I2C) Module User's Guide (Rev. E) 25 Mar 2011
User guide TMS320DM643x DMP DDR2 Memory Controller User's Guide (Rev. C) 12 Jan 2011
User guide TMS320DM643x DMP EMAC/MDIO User's Guide (Rev. C) 23 Dec 2010
User guide TMS320DM643x DMP Video Processing Front End (VPFE) User's Guide (Rev. D) 25 Aug 2010
User guide TMS320DM643x DMP Pulse-Width Modulator (PWM) User's Guide (Rev. B) 05 Aug 2010
User guide TMS320C64x+ DSP Megamodule Reference Guide (Rev. K) 03 Aug 2010
User guide TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide (Rev. J) 30 Jul 2010
User guide TMS320DM643x DMP Peripheral Component Interconnect (PCI) User's Guide (Rev. C) 14 May 2010
Application note TMS320DM643x Power Consumption Summary (Rev. C) 10 May 2010
User guide TMS320C6000 Assembly Language Tools v 7.0 User's Guide (Rev. S) 18 Mar 2010
User guide TMS320C6000 Optimizing Compiler v 7.0 User's Guide (Rev. Q) 18 Mar 2010
User guide TMS320DM643x DMP Universal Asynchronous Receiver/Transmitter (UART) UG (Rev. C) 16 Dec 2009
Application note Canny Edge Detection Implementation on TMS320C64x/64x+ Using VLIB 25 Nov 2009
Application note Running a TMS320C64x+ Codec Across TMS320C64x+ Based DSP Platforms 24 Sep 2009
Application note Common Object File Format (COFF) 15 Apr 2009
User guide TMS320DM643x DMP Asynchronous External Memory Interface (EMIF) UG (Rev. B) 24 Feb 2009
User guide TMS320C64x+ DSP Cache User's Guide (Rev. B) 11 Feb 2009
Application note 12Vin DM643x Power using Integrated-FET DC/DC Converters and LDO 09 Oct 2008
Application note 5Vin DM643x Power using DC/DC Controllers and LDO 09 Oct 2008
Application note 5Vin DM643x Power using Integrated-FET DC/DC Converters and LDO 09 Oct 2008
Application note 5Vin DM643x Power using a PMIC (Multi-output DC/DC Converter) 09 Oct 2008
Application note Migrating from EDMA v2.0 to EDMA v3.0 TMS320C64X DSP (Rev. A) 21 Aug 2008
Application note Migrating from TMS320DM642 to TMS320DM648/DM6437 19 Aug 2008
Application note Understanding the Davinci Preview Engine (Rev. A) 23 Jul 2008
Application note Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A) 17 Jul 2008
Application note Understanding the Davinci Resizer (Rev. B) 17 Jul 2008
User guide TMS320DM643x DMP Host Port Interface (HPI) User's Guide (Rev. D) 16 Jul 2008
Application note Implementing DDR2 PCB Layout on the TMS320DM643x DMSoC (Rev. A) 26 Jun 2008
Application note How to Use the EDMA3 Driver on a TMS320DM643x Device (Rev. A) 16 Jun 2008
User guide TMS320C6000 Assembly Language Tools v 6.1 User's Guide (Rev. Q) 15 May 2008
User guide TMS320C6000 Optimizing Compiler v 6.1 User's Guide (Rev. O) 15 May 2008
User guide TMS320C64x+ DSP Image/Video Processing Library (v2.0) Programmer's Reference (Rev. A) 05 May 2008
User guide TMS320DM643x DMP General-Purpose Input/Output (GPIO) User's Guide (Rev. B) 18 Mar 2008
User guide TMS320DM643x DMP Multichannel Audio Serial Port (McASP) User's Guide (Rev. D) 13 Mar 2008
User guide TMS320C64x+ DSP Little-Endian Library Programmer's Reference (Rev. B) 06 Mar 2008
User guide TMS320DM643x DMP Enhanced DMA (EDMA) Controller User's Guide (Rev. A) 03 Mar 2008
User guide TMS320DM643x DMP DSP Subsystem Reference Guide (Rev. E) 05 Feb 2008
Application note Installing ObjectVideo OnBoard With the TMS320DM6437 EVM 15 Jan 2008
User guide TMS320DM643x DMP Video Processing Back End (VPBE) User's Guide (Rev. A) 18 Dec 2007
Application note How to Use the VPBE and VPFE Driver on the TMS320DM643x Devices (Rev. A) 14 Nov 2007
Application note Migrating from TMS320DM6446 to TMS320DM6437 05 Nov 2007
User guide TMS320DM643x DMP VLYNQ Port User's Guide (Rev. B) 20 Sep 2007
User guide TMS320DM643x DMP Multichannel Buffered Serial Port (McBSP) User's Guide (Rev. C) 17 Sep 2007
User guide TMS320DM6437 DVDP Getting Started Guide 31 Jul 2007
Application note TMS320DM643x Pin Multiplexing Utility 06 Jul 2007
Application note Migrating from TMS320DM642 to TMS320DM6437 29 Jun 2007
EVM User's guide TMS320C6000 Network Developer's Kit (NDK) Support Package for EVMDM6437 UG 26 Jun 2007
User guide TMS320DM643x DMP Peripherals Overview Reference Guide (Rev. A) 25 Jun 2007
Application note Thermal Considerations for the DM64xx, DM64x, and C6000 Devices 20 May 2007
User guide TMS320DM643x DMP High-End CAN Controller (HECC) User's Guide (Rev. A) 15 May 2007
More literature TMS320C6000 DSP TCP/IP Stack Software (Rev. C) 04 Apr 2007
More literature DaVinci Technology - Digital Video Innovation Product Bulletin (Rev. D) 13 Feb 2007
More literature Overview of DaVinci™ TMS320DM643x Digital Media Portfolio (Rev. B) 13 Feb 2007
Application note DaVinci Technology Background and Specifications (Rev. A) 04 Jan 2007
User guide TMS320DM643x DMP 64-Bit Timer User's Guide 18 Dec 2006
Application note Clock Recommendations for the DM643x EVM 29 Nov 2006
User guide TMS320C64x+ DSP Big-Endian Library Programmer's Reference 10 Mar 2006
User guide TMS320C64x+ Image/Video Processing Library Programmer's Reference 10 Mar 2006
Application note Migrating from TMS320C64x to TMS320C64x+ (Rev. A) 20 Oct 2005

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Debug probe

TMDSEMU200-U — XDS200 USB Debug Probe

The XDS200 is a debug probe (emulator) used for debugging TI embedded devices.  The XDS200 features a balance of low cost with good performance as compared to the low cost XDS110 and the high performance XDS560v2.  It supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a (...)

Not available on TI.com
Debug probe

TMDSEMU560V2STM-U — XDS560™ software v2 system trace USB debug probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).  Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com
Debug probe

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB & Ethernet Debug Probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com
Application software & framework

TMDMFP — Multimedia Framework Products (MFP) - Codec Engine, Framework Components and XDAIS

Multimedia Framework Products (MFP)

A major advantage of programmable signal processors over fixed-function devices is their ability to accelerate multiple multimedia functions and provide flexible environments to enable user customization. However, sharing scarce embedded hardware resources between (...)

Code example or demo

DEMO-DM6437EDGE DEMO: DM6437 Edge Detection Example Code

Free Example Code - TI provides proof-of-concept application code to demonstrate some of the hardware and software capabilities of its devices.

  • Click GET SOFTWARE to access Application Demo and Documentation, based on the DM6437 EVM (evaluation module).
Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP
Download options
Driver or library

AEC-AER Acoustic echo cancellation/removal for TI C64x+, C674x, C55x and Cortex®-A8 processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware

Supported products & hardware

Products
Arm-based processors
66AK2G12 High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6201-EP Enhanced product C6201 fixed point DSP SM320C6415 Military grade C64x fixed point DSP SM320C6415-EP Enhanced product C6415 fixed point DSP SM320C6424-EP Enhanced product C6424 fixed point DSP SM320C6455-EP Enhanced product C6455 fixed point DSP SM320C6472-HIREL High reliability product 6 Core C6472 fixed point DSP SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP SM320C6701 Single core C67x floating-point DSP for military applications - up to 167MHz SM320C6701-EP Enhanced product C6701 floating-point DSP SM320C6711D-EP Enhanced product C6711D floating-point DSP SM320C6712D-EP Enhanced product C6712D DSP SM320C6713B-EP Enhanced product C6713 floating-point DSP SM320C6727B Military grade C6727B floating-point DSP SM320C6727B-EP Enhanced product C6727 floating-point DSP SM320DM642-HIREL High reliability product digital media DM642 DSP SM32C6416T-EP Enhanced product C6416T fixed point DSP SMJ320C6201B Fixed Point Digital Signal Processor, Military SMJ320C6203 Military grade C62x fixed point DSP - ceramic package SMJ320C6415 Military grade C64x fixed point DSP - ceramic package SMJ320C6701 Military grade C67x floating-point DSP - ceramic package SMJ320C6701-SP Space grade C6701 floating-point DSP - rad-tolerant class V with ceramic package SMV320C6727B-SP Space grade C6727B floating-point DSP - rad-tolerant class V with ceramic package TMS320C5517 Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C5532 Low power C55x fixed point DSP- up to 100MHz TMS320C5533 Low power C55x fixed point DSP- up to 100MHz, USB TMS320C5534 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface TMS320C5535 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C6201 Fixed-Point Digital Signal Processor TMS320C6202 Fixed-Point Digital Signal Processor TMS320C6202B C62x fixed point DSP- up to 300MHz, 384KB TMS320C6203B C62x fixed point DSP- up to 300MHz, 896KB TMS320C6204 Fixed-Point Digital Signal Processor TMS320C6205 Fixed-Point Digital Signal Processor TMS320C6211B C62x fixed point DSP- up to 167MHz TMS320C6411 C64x fixed point DSP- up to 300MHz, McBSP TMS320C6414 C64x fixed point DSP- up to 720MHz, McBSP TMS320C6415 C64x fixed point DSP- up to 720MHz, McBSP, PCI TMS320C6416 C64x fixed point DSP- up to 720MHz, McBSP, PCI, VCP/TCP TMS320C6421Q C64x+ fixed point DSP- up to 600MHz, 8 Bit EMIFA, 16-Bit DDR2 TMS320C6424Q C64x+ fixed point DSP- up to 600MHz, 16/8-Bit EMIFA, 32/16 Bit DDR2 TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6701 C67x floating-point DSP- up to 167MHz, McBSP TMS320C6711D C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA TMS320C6712D C67x floating-point DSP- up to 150MHz, McBSP, 16-Bit EMIFA TMS320C6720 C67x floating-point DSP - 200MHz, McASP, 16-Bit EMIFA TMS320C6722B C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA TMS320C6726B C67x floating-point DSP- up to 266MHz, McASP, 16-Bit EMIFA TMS320C6727 C67x floating-point DSP- up to 250MHz, McASP, 32-Bit EMIFA TMS320C6727B C67x floating-point DSP- up to 350MHz, McASP, 32-Bit EMIFA TMS320C6743 Low power C674x floating-point DSP- 375MHz TMS320C6745 Low power C674x floating-point DSP- 456MHz, QFP TMS320C6747 Low power C674x floating-point DSP- 456MHz, PBGA TMS320DM642Q Video/imaging fixed-point digital signal processor TMS320DM6431Q Digital media processor, up to 2400 MIPS, 300 MHz clock rate TMS320DM6435Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 1 McBSP TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip TMS320DM647 Digital Media Processor
Download options
Driver or library

FAXLIB FAX library (FAXLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware

Supported products & hardware

Products
Arm-based processors
66AK2G12 High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6201-EP Enhanced product C6201 fixed point DSP SM320C6415 Military grade C64x fixed point DSP SM320C6415-EP Enhanced product C6415 fixed point DSP SM320C6424-EP Enhanced product C6424 fixed point DSP SM320C6455-EP Enhanced product C6455 fixed point DSP SM320C6472-HIREL High reliability product 6 Core C6472 fixed point DSP SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP SM320C6701 Single core C67x floating-point DSP for military applications - up to 167MHz SM320C6701-EP Enhanced product C6701 floating-point DSP SM320C6711D-EP Enhanced product C6711D floating-point DSP SM320C6712D-EP Enhanced product C6712D DSP SM320C6713B-EP Enhanced product C6713 floating-point DSP SM320C6727B Military grade C6727B floating-point DSP SM320C6727B-EP Enhanced product C6727 floating-point DSP SM320DM642-HIREL High reliability product digital media DM642 DSP SM32C6416T-EP Enhanced product C6416T fixed point DSP SMJ320C6201B Fixed Point Digital Signal Processor, Military SMJ320C6203 Military grade C62x fixed point DSP - ceramic package SMJ320C6415 Military grade C64x fixed point DSP - ceramic package SMJ320C6701 Military grade C67x floating-point DSP - ceramic package SMJ320C6701-SP Space grade C6701 floating-point DSP - rad-tolerant class V with ceramic package SMV320C6727B-SP Space grade C6727B floating-point DSP - rad-tolerant class V with ceramic package TMS320C5517 Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C5532 Low power C55x fixed point DSP- up to 100MHz TMS320C5533 Low power C55x fixed point DSP- up to 100MHz, USB TMS320C5534 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface TMS320C5535 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C6201 Fixed-Point Digital Signal Processor TMS320C6202 Fixed-Point Digital Signal Processor TMS320C6202B C62x fixed point DSP- up to 300MHz, 384KB TMS320C6203B C62x fixed point DSP- up to 300MHz, 896KB TMS320C6204 Fixed-Point Digital Signal Processor TMS320C6205 Fixed-Point Digital Signal Processor TMS320C6211B C62x fixed point DSP- up to 167MHz TMS320C6411 C64x fixed point DSP- up to 300MHz, McBSP TMS320C6414 C64x fixed point DSP- up to 720MHz, McBSP TMS320C6415 C64x fixed point DSP- up to 720MHz, McBSP, PCI TMS320C6416 C64x fixed point DSP- up to 720MHz, McBSP, PCI, VCP/TCP TMS320C6421Q C64x+ fixed point DSP- up to 600MHz, 8 Bit EMIFA, 16-Bit DDR2 TMS320C6424Q C64x+ fixed point DSP- up to 600MHz, 16/8-Bit EMIFA, 32/16 Bit DDR2 TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6701 C67x floating-point DSP- up to 167MHz, McBSP TMS320C6711D C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA TMS320C6712D C67x floating-point DSP- up to 150MHz, McBSP, 16-Bit EMIFA TMS320C6720 C67x floating-point DSP - 200MHz, McASP, 16-Bit EMIFA TMS320C6722B C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA TMS320C6726B C67x floating-point DSP- up to 266MHz, McASP, 16-Bit EMIFA TMS320C6727 C67x floating-point DSP- up to 250MHz, McASP, 32-Bit EMIFA TMS320C6727B C67x floating-point DSP- up to 350MHz, McASP, 32-Bit EMIFA TMS320C6743 Low power C674x floating-point DSP- 375MHz TMS320C6745 Low power C674x floating-point DSP- 456MHz, QFP TMS320C6747 Low power C674x floating-point DSP- 456MHz, PBGA TMS320DM642Q Video/imaging fixed-point digital signal processor TMS320DM6431Q Digital media processor, up to 2400 MIPS, 300 MHz clock rate TMS320DM6435Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 1 McBSP TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip TMS320DM647 Digital Media Processor
Download options
Driver or library

SPRC122 — C62x/C64x Fast Run-Time Support (RTS) Library

The C62x/64x FastRTS Library is an optimized, floating-point function library for C programmers using either TMS320C62x or TMS320C64x devices. These routines are typically used in computationally intensive real-time applications where optimal execution speed is critical. By replacing the current (...)
Driver or library

VOLIB Voice library (VoLIB) for C66x, C64x+ and C55x processors

Voice Library - VoLIB provides components that, together, facilitate the development of the signal processing chain for Voice over IP applications such as infrastructure, enterprise, residential gateways and IP phones. Together with optimized implementations of ITU-T voice codecs, that can be (...)

Supported products & hardware

Supported products & hardware

Products
Arm-based processors
66AK2G12 High performance multicore DSP+Arm - 1x Arm A15 cores, 1x C66x DSP core
Digital signal processors (DSPs)
DM505 SoC for vision analytics 15mm package SM320C6201-EP Enhanced product C6201 fixed point DSP SM320C6415 Military grade C64x fixed point DSP SM320C6415-EP Enhanced product C6415 fixed point DSP SM320C6424-EP Enhanced product C6424 fixed point DSP SM320C6455-EP Enhanced product C6455 fixed point DSP SM320C6472-HIREL High reliability product 6 Core C6472 fixed point DSP SM320C6678-HIREL High reliability product high performance 8-core C6678 fixed and floating-point DSP SM320C6701 Single core C67x floating-point DSP for military applications - up to 167MHz SM320C6701-EP Enhanced product C6701 floating-point DSP SM320C6711D-EP Enhanced product C6711D floating-point DSP SM320C6712D-EP Enhanced product C6712D DSP SM320C6713B-EP Enhanced product C6713 floating-point DSP SM320C6727B Military grade C6727B floating-point DSP SM320C6727B-EP Enhanced product C6727 floating-point DSP SM320DM642-HIREL High reliability product digital media DM642 DSP SM32C6416T-EP Enhanced product C6416T fixed point DSP SMJ320C6201B Fixed Point Digital Signal Processor, Military SMJ320C6203 Military grade C62x fixed point DSP - ceramic package SMJ320C6415 Military grade C64x fixed point DSP - ceramic package SMJ320C6701 Military grade C67x floating-point DSP - ceramic package SMJ320C6701-SP Space grade C6701 floating-point DSP - rad-tolerant class V with ceramic package SMV320C6727B-SP Space grade C6727B floating-point DSP - rad-tolerant class V with ceramic package TMS320C5517 Low power C55x fixed point DSP- up to 200MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C5532 Low power C55x fixed point DSP- up to 100MHz TMS320C5533 Low power C55x fixed point DSP- up to 100MHz, USB TMS320C5534 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface TMS320C5535 Low power C55x fixed point DSP- up to 100MHz, USB, LCD interface, FFT HWA, SAR ADC TMS320C6201 Fixed-Point Digital Signal Processor TMS320C6202 Fixed-Point Digital Signal Processor TMS320C6202B C62x fixed point DSP- up to 300MHz, 384KB TMS320C6203B C62x fixed point DSP- up to 300MHz, 896KB TMS320C6204 Fixed-Point Digital Signal Processor TMS320C6205 Fixed-Point Digital Signal Processor TMS320C6211B C62x fixed point DSP- up to 167MHz TMS320C6411 C64x fixed point DSP- up to 300MHz, McBSP TMS320C6414 C64x fixed point DSP- up to 720MHz, McBSP TMS320C6415 C64x fixed point DSP- up to 720MHz, McBSP, PCI TMS320C6416 C64x fixed point DSP- up to 720MHz, McBSP, PCI, VCP/TCP TMS320C6421Q C64x+ fixed point DSP- up to 600MHz, 8 Bit EMIFA, 16-Bit DDR2 TMS320C6424Q C64x+ fixed point DSP- up to 600MHz, 16/8-Bit EMIFA, 32/16 Bit DDR2 TMS320C6454 C64x+ fixed point DSP- up to 1GHz, 64-Bit EMIFA, 32/16 Bit DDR2, 1 Gbps Ethernet TMS320C6457 Communications infrastructure digital signal processor TMS320C6701 C67x floating-point DSP- up to 167MHz, McBSP TMS320C6711D C67x floating-point DSP- up to 250MHz, McBSP, 32-Bit EMIFA TMS320C6712D C67x floating-point DSP- up to 150MHz, McBSP, 16-Bit EMIFA TMS320C6720 C67x floating-point DSP - 200MHz, McASP, 16-Bit EMIFA TMS320C6722B C67x floating-point DSP- up to 250MHz, McASP, 16-Bit EMIFA TMS320C6726B C67x floating-point DSP- up to 266MHz, McASP, 16-Bit EMIFA TMS320C6727 C67x floating-point DSP- up to 250MHz, McASP, 32-Bit EMIFA TMS320C6727B C67x floating-point DSP- up to 350MHz, McASP, 32-Bit EMIFA TMS320C6743 Low power C674x floating-point DSP- 375MHz TMS320C6745 Low power C674x floating-point DSP- 456MHz, QFP TMS320C6747 Low power C674x floating-point DSP- 456MHz, PBGA TMS320DM642Q Video/imaging fixed-point digital signal processor TMS320DM6431Q Digital media processor, up to 2400 MIPS, 300 MHz clock rate TMS320DM6435Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 1 McBSP TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip TMS320DM647 Digital Media Processor
Download options
Software codec

C64XPLUSCODECSPCH Speech Codecs for C64x+-based Devices

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes are on (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320C6457 Communications infrastructure digital signal processor TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip
Download options
Software codec

C64XPLUSCODECSVID C64x+ Video Codecs - Software and Documentation

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into video and voice applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes are on (...)

Supported products & hardware

Supported products & hardware

Products
Digital signal processors (DSPs)
TMS320C6457 Communications infrastructure digital signal processor TMS320DM6437Q Digital media processor, up to 4800 MIPS, 600 MHz clock rate, 1 McASP, 2 McBSP TMS320DM6441 DaVinci Digital Media System-on-Chip TMS320DM6467T Digital Media System-on-Chip
Download options
Software codec

TMDXDAISXDM — eXpressDSP Algorithm Standard – xDAIS Developer’s Kit and xDM

xDAIS and xDM

The eXpressDSP™ Algorithm Interoperability Standard (xDAIS) and the eXpressDSP Digital Media (xDM) standard fully leverage the ability of DSPs to perform a wide range of multimedia functions on a single device. eXpressDSP compliance is achieved by adhering to these standards. To (...)

Simulation model

DM6437 ZDU BSDL Model (Rev. B)

SPRM222B.ZIP (10 KB) - BSDL Model
Simulation model

DM6437 ZDU IBIS Model (Rev. B)

SPRM231B.ZIP (267 KB) - IBIS Model
Simulation model

DM6437 ZWT BSDL Model (Rev. C)

SPRM221C.ZIP (10 KB) - BSDL Model
Simulation model

DM6437 ZWT IBIS Model (Rev. B)

SPRM230B.ZIP (267 KB) - IBIS Model
Design tool

PROCESSORS-3P-SEARCH — Arm®-based MPU, Arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
Package Pins Download
BGA (ZDU) 376 View options
NFBGA (ZWT) 361 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Support & training

TI E2E™ forums with technical support from TI engineers

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If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

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