TPL0202-10

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256-tap dual-channel digital potentiometer (digipot) with SPI and nonvolatile memory

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Product details

Parameters

Number of steps 256 Number of channels (#) 2 Resistance taper Linear Interface type SPI Memory Non-Volatile Bandwidth (MHz) 2 Temp coeff (typ) (ppm/°C) 132 Operating temperature range (C) -40 to 105 open-in-new Find other Digital potentiometers (digipots)

Package | Pins | Size

WQFN (RTE) 16 9 mm² 3 x 3 open-in-new Find other Digital potentiometers (digipots)

Features

  • Two Potentiometers With 256-Position Resolution
  • Non-Volatile Memory Stores Wiper Settings
  • 10-kΩ End-to-End Resistance (TPL0202-10)
  • Fast Power-Up Response Time: <100 µs
  • ±1 LSB INL, ±0.5 LSB DNL (Voltage-Divider Mode)
  • 12 ppm/°C Ratiometric Temperature Coefficient
  • SPI Serial Interface
  • 2.7 to 5.5 V Single-Supply Operation
  • Operating Temperature Range From –40°C to +105°C
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Description

The TPL0202 has two linear-taper digital potentiometers (DPOTs) with 256 wiper positions. Each potentiometer can be used as a three-terminal potentiometer or as a two-terminal rheostat. The TPL0202-10 has an end-to-end resistance of 10 kΩ.

This DPOT can be used as a mechanical potentiometer replacement, allowing the user (or software) to digitally control and adjust resistance.

The TPL0202 has non-volatile memory (EEPROM) which can be used to store the wiper position for automatic recall upon power-up. The internal registers of the TPL0202 can be accessed using a SPI-compatible digital interface.

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Technical documentation

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Type Title Date
* Datasheet TPL0202 256-Taps Dual Channel Digital Potentiometer With SPI and Non-Volatile Memory datasheet (Rev. E) Feb. 17, 2017
Application notes Replacing Digital Potentiometers with Precision DACs Jul. 03, 2019
Technical articles Doing the math: The inside story of the Analog Engineer’s Pocket Reference Mar. 02, 2015
Technical articles SAR ADC response times: Interface topology makes a difference (Part 3) Feb. 17, 2015
Technical articles SAR ADC response times: Interface topology makes a difference (Part 2) Feb. 13, 2015
Technical articles SAR ADC response times: Interface topology makes a difference (Part 1) Jan. 16, 2015

Design & development

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Design tools & simulation

SIMULATION MODELS Download
SLIM305.ZIP (9 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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Reference designs

REFERENCE DESIGNS Download
LIDAR Pulsed Time of Flight Reference Design
TIDA-00663 — Light Detection and Ranging (LIDAR) systems use the time taken by the light to fly back and forth to an object in an effort to measure the distance to this target.  The TIDA-00663 reference design shows how to design the time measurement back-end for LIDAR based on Time to Digital Converter (...)
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CAD/CAE symbols

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WQFN (RTE) 16 View options

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