256-tap dual-channel digital potentiometer (digipot) with SPI and nonvolatile memory


Product details


Number of steps 256 Number of channels (#) 2 Resistance taper Linear Interface type SPI Memory Non-Volatile Bandwidth (MHz) 2 Temp coeff (typ) (ppm/°C) 132 Operating temperature range (C) -40 to 105 open-in-new Find other Digital potentiometers (digipots)

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WQFN (RTE) 16 9 mm² 3 x 3 open-in-new Find other Digital potentiometers (digipots)


  • Two Potentiometers With 256-Position Resolution
  • Non-Volatile Memory Stores Wiper Settings
  • 10-kΩ End-to-End Resistance (TPL0202-10)
  • Fast Power-Up Response Time: <100 µs
  • ±1 LSB INL, ±0.5 LSB DNL (Voltage-Divider Mode)
  • 12 ppm/°C Ratiometric Temperature Coefficient
  • SPI Serial Interface
  • 2.7 to 5.5 V Single-Supply Operation
  • Operating Temperature Range From –40°C to +105°C
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The TPL0202 has two linear-taper digital potentiometers (DPOTs) with 256 wiper positions. Each potentiometer can be used as a three-terminal potentiometer or as a two-terminal rheostat. The TPL0202-10 has an end-to-end resistance of 10 kΩ.

This DPOT can be used as a mechanical potentiometer replacement, allowing the user (or software) to digitally control and adjust resistance.

The TPL0202 has non-volatile memory (EEPROM) which can be used to store the wiper position for automatic recall upon power-up. The internal registers of the TPL0202 can be accessed using a SPI-compatible digital interface.

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Technical documentation

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Type Title Date
* Datasheet TPL0202 256-Taps Dual Channel Digital Potentiometer With SPI and Non-Volatile Memory datasheet (Rev. E) Feb. 17, 2017
Application notes Replacing Digital Potentiometers with Precision DACs Jul. 03, 2019
Technical articles Doing the math: The inside story of the Analog Engineer’s Pocket Reference Mar. 02, 2015
Technical articles SAR ADC response times: Interface topology makes a difference (Part 3) Feb. 17, 2015
Technical articles SAR ADC response times: Interface topology makes a difference (Part 2) Feb. 13, 2015
Technical articles SAR ADC response times: Interface topology makes a difference (Part 1) Jan. 16, 2015

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