3-V to 28-V, dual-synchronous buck controller for low output voltage rails in embedded computing
Product details
Parameters
We are not able to display this information. Please refer to the product data sheet.Package | Pins | Size
Features
- High Efficiency, Low-Power Consumption, Shutdowns to <1 µA
- Fixed Frequency Emulated On-Time Control, Frequency Selectable From Three Options
- D-CAP Mode Enables Fast Transient Response
- Auto-Skip Mode
- Less Than 1% Initial Reference Accuracy
- Low Output Ripple
- Wide Input Voltage Range: 3 V to 28 V
- Output Voltage Range: 0.76 V to 5.5 V
- Low-Side RDS(on) Loss-less Current Sensing
- Adaptive Gate Drivers With Integrated Boost Diode
- Internal 1.2-ms Voltage-Servo Soft Start
- Power-Good Signals for Each Channel With Delay Timer
- Output Discharge During Disable, Fault
- APPLICATIONS
- I/O and Low Voltage System Bus in Embedded Computing Systems
Description
The TPS59124 is a dual, adaptive on-time D-CAP mode synchronous buck controller. This device enables system designers to cost effectively complete the suite of embedded computer power bus regulators with the absolute lowest external component count and lowest standby consumption. The fixed-frequency emulated adaptive on-time control supports seamless operation between PWM mode at heavy load condition and reduced frequency operation at light load for high-efficiency down to milliampere range. The main control loop for the TPS59124 uses the D-CAP mode that optimized for low-ESR output capacitors such as POSCAP or SP-CAP promises fast transient response with no external compensation. Simple and separate power good signals for each channel allow flexibility of power sequencing. The device provides convenient and efficient operation with supply input voltages (V5IN, V5FILT) ranging from 4.5 V to 5.5 V, conversion voltages (drain voltage for the synchronous high-side MOSFET) from 3 V to 28 V and output voltages from 0.76 V to 5.5 V.
The TPS59124 is available in 24-pin QFN package specified from –40°C to 85°C ambient temperature range.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | Dual Synchronous Step-Down Controller for Low Voltage Power Rails in Embedded C datasheet | Apr. 30, 2010 |
Selection guide | Power Management Guide 2018 (Rev. R) | Jun. 25, 2018 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Reference designs
Design files
-
download PMP5855 BOM (EVM).pdf (37KB) -
download PMP5855 BOM (Daughter Card).pdf (25KB) -
download PMP5855 Gerber (EVM).zip (724KB) -
download PMP5855 Gerber (Daughter Card).zip (336KB) -
download PMP5855 PCB (EVM).pdf (1549KB) -
download PMP5855 PCB (Daughter Card).pdf (846KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
VQFN (RGE) | 24 | View options |
Ordering & quality
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