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Product details

Parameters

Output options Adjustable Output, Fixed Output, Dual Output Iout (Max) (A) 0.25 Vin (Max) (V) 5.5 Vin (Min) (V) 2.7 Vout (Max) (V) 5.4 Vout (Min) (V) 1.2 Fixed output options (V) 1.8, 2.8, 2.85 Noise (uVrms) 32 Iq (Typ) (mA) 0.3 Thermal resistance θJA (°C/W) 50 Approx. price (US$) 0.83 | 1ku Load capacitance (Min) (µF) 2.2 Rating Catalog Regulated outputs (#) 2 Features Enable Accuracy (%) 3 PSRR @ 100 KHz (dB) 37 Dropout voltage (Vdo) (Typ) (mV) 125 Operating temperature range (C) -40 to 125 open-in-new Find other Linear regulators (LDO)

Package | Pins | Size

VSON (DRC) 10 9 mm² 3.00 x 3.00 open-in-new Find other Linear regulators (LDO)

Features

  • Dual 250 mA High-Performance RF LDOs
  • Available in Fixed and Adjustable
    Voltage Options (1.2 V to 5.5 V)
  • High PSRR: 65 dB at 10 kHz
  • UltraLow Noise: 32 µVrms
  • Fast Start-Up Time: 60 µs
  • Stable with 2.2 µF Ceramic Capacitor
  • Excellent Load/Line Transient Response
  • Very Low Dropout Voltage: 125 mV at 250 mA
  • Independent Enable Pins
  • Thermal Shutdown and Independent Current Limit
  • Available in Thermally-Enhanced SON Package: 3mm × 3mm × 1mm
  • APPLICATIONS
    • Cellular and Cordless Phones
    • Wireless PDA/Handheld Products
    • PCMCIA/Wireless LAN Applications
    • Digital Camera/Camcorder/Internet Audio
    • DSP/FPGA/ASIC/Controllers and Processors

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Description

The TPS712xx family of low-dropout (LDO) voltage regulators is tailored to noise-sensitive and RF applications. These products feature dual 250 mA LDOs with ultralow noise, high power-supply rejection ratio (PSRR), and fast transient and start-up response. Each regulator output is stable with low-cost 2.2 µF ceramic output capacitors and features very low dropout voltages (125 mV typical at 250 mA). Each regulator achieves fast start-up times (approximately 60 µs with a 0.001 µF bypass capacitor) while consuming very low quiescent current (300 µA typical with both outputs enabled). When the device is placed in standby mode, the supply current is reduced to less than 0.3 µA typical. Each regulator exhibits approximately 32 µrms of output voltage noise with VOUT = 2.8 V and a 0.01 µF noise reduction (NR) capacitor. Applications with analog components that are noise-sensitive, such as portable RF electronics, will benefit from high PSRR, low noise, and fast line and load transient features. The TPS712 family is offered in a thin 3mm × 3mm SON package and is fully specified from –40°C to +125°C (TJ).

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Technical documentation

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Type Title Date
* Datasheet Dual 250-mA Output, UltraLow Noise, High PSRR, Low-Dropout Linear Regulator datasheet (Rev. D) Aug. 17, 2010
Application notes Using Thermal Calculation Tools for Analog Components (Rev. A) Aug. 30, 2019
Technical articles LDO basics: capacitor vs. capacitance Aug. 01, 2018
Technical articles LDO Basics: Preventing reverse current Jul. 25, 2018
Technical articles LDO basics: introduction to quiescent current Jun. 20, 2018
Application notes LDO Noise Demystified (Rev. A) Aug. 09, 2017
Application notes LDO PSRR Measurement Simplified (Rev. A) Aug. 09, 2017
Technical articles LDO basics: noise – part 1 Jun. 14, 2017
Selection guides Power Management for Xilinx FPGAs Feb. 04, 2014
Application notes Power for TMS320C5504/05 (Rev. A) Apr. 23, 2010
Application notes Powering OMAP™3 With TPS6235x: Design-In Guide Dec. 03, 2008
User guides TPS712xxEVM User's Guide Feb. 07, 2005

Design & development

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Design tools & simulation

SCHEMATICS Download
SLUA480.PDF (129 KB)

CAD/CAE symbols

Package Pins Download
VSON (DRC) 10 View options

Ordering & quality

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