The TXG404x is a 4-bit, fixed direction,
non-galvanic based voltage and ground-level translator that supports both
logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±40V. Compared to traditional level shifters, the TXG404x family solves the challenges of voltage
translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to
parasitic resistance or capacitance.
VCCA is referenced to GNDA
and VCCB is referenced to GNDB. Ax pins are referenced to VCCA
logic level while Bx pins are referenced to VCCB logic levels. Both A
port and B port accept voltages from 1.71V to 5.5V. This device includes two enable
pins that can place the respective outputs in a high-impedance state when the OE pin
is connected to GND or left floating. In the event of input power or signal loss,
the output is default low when OE is High (refer to ). The leakage between GNDA and GNDB is <45nA when
VCC to GND is shorted.
The TXG404x device helps improve noise immunity and power sequencing across
different ground domains while providing low power consumption, latency, and
channel-to-channel skew. The device supresses noise levels of 80VPP up to
5MHz (Figure 7-5). TXG404x can support multiple
interfaces such as SPI, UART, GPIO, and I2S.
The TXG404x is a 4-bit, fixed direction,
non-galvanic based voltage and ground-level translator that supports both
logic-level shifting between 1.71V to 5.5V and ground-level shifting up to ±40V. Compared to traditional level shifters, the TXG404x family solves the challenges of voltage
translation across different ground levels. The Simplified Diagram shows a common use case where DC shift occurs between GNDA to GNDB due to
parasitic resistance or capacitance.
VCCA is referenced to GNDA
and VCCB is referenced to GNDB. Ax pins are referenced to VCCA
logic level while Bx pins are referenced to VCCB logic levels. Both A
port and B port accept voltages from 1.71V to 5.5V. This device includes two enable
pins that can place the respective outputs in a high-impedance state when the OE pin
is connected to GND or left floating. In the event of input power or signal loss,
the output is default low when OE is High (refer to ). The leakage between GNDA and GNDB is <45nA when
VCC to GND is shorted.
The TXG404x device helps improve noise immunity and power sequencing across
different ground domains while providing low power consumption, latency, and
channel-to-channel skew. The device supresses noise levels of 80VPP up to
5MHz (Figure 7-5). TXG404x can support multiple
interfaces such as SPI, UART, GPIO, and I2S.