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TXV0106

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Dual-supply fixed-direction six-channel voltage translator

Product details

Technology family AVC Applications GPIO, JTAG, RGMII, SPI, UART Bits (#) 6 High input voltage (min) (V) 1.08 High input voltage (max) (V) 3.6 Vout (min) (V) 1.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 250 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 16 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AVC Applications GPIO, JTAG, RGMII, SPI, UART Bits (#) 6 High input voltage (min) (V) 1.08 High input voltage (max) (V) 3.6 Vout (min) (V) 1.65 Vout (max) (V) 3.6 Data rate (max) (Mbps) 250 IOH (max) (mA) -12 IOL (max) (mA) 12 Supply current (max) (µA) 16 Features Output enable, Overvoltage tolerant inputs, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Catalog Operating temperature range (°C) -40 to 125
WQFN (BQB) 16 8.75 mm² 3.5 x 2.5
  • Configurable design allows each port to operate with a power supply range from 1.2 V to 3.6 V

  • Supports up to 500Mbps for 1.65 V to 3.6 V
  • Meets RGMII 2.0 timing specifications:
    • < 750 ps rise and fall time
    • < ± 5 % duty cycle distortion
    • < ± 400 ps channel to channel skew
    • Up to 250Mbps/channel
  • Integrated 10 Ω damping output resistor to minimize signal reflections
  • High drive strength (up to 12 mA at 3.6 V)
  • Fully configurable symmetric dual-rail design
  • Optimal signal integrity performance with 390ps peak-to-peak jitter for 1.8 V to 3.3 V
  • Features VCC isolation and VCC disconnect
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 2000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Low power consumption:
    • 10-µA maximum (25°C)
    • 20-µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C
  • Configurable design allows each port to operate with a power supply range from 1.2 V to 3.6 V

  • Supports up to 500Mbps for 1.65 V to 3.6 V
  • Meets RGMII 2.0 timing specifications:
    • < 750 ps rise and fall time
    • < ± 5 % duty cycle distortion
    • < ± 400 ps channel to channel skew
    • Up to 250Mbps/channel
  • Integrated 10 Ω damping output resistor to minimize signal reflections
  • High drive strength (up to 12 mA at 3.6 V)
  • Fully configurable symmetric dual-rail design
  • Optimal signal integrity performance with 390ps peak-to-peak jitter for 1.8 V to 3.3 V
  • Features VCC isolation and VCC disconnect
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • ESD protection exceeds JESD 22:
    • 2000-V Human-Body Model
    • 1000-V Charged-Device Model
  • Low power consumption:
    • 10-µA maximum (25°C)
    • 20-µA maximum (–40°C to 125°C)
  • Operating temperature from –40°C to +125°C

The TXV0106 is a 6-bit, dual-supply fixed-direction low-skew, low jitter voltage translation device. This device can be used for redriving, voltage translation and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY. The Ax I/O pins and enable pin (OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise or fall timing for applications requiring strict timing conditions.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.

The TXV0106 transmits data in a fixed direction from the A bus to the B bus. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

The TXV0106 is a 6-bit, dual-supply fixed-direction low-skew, low jitter voltage translation device. This device can be used for redriving, voltage translation and power isolation when implementing skew sensitive interface, such as RGMII between Ethernet MAC and PHY. The Ax I/O pins and enable pin (OE) are referenced to VCCA logic levels, and Bx I/O pins are referenced to VCCB logic levels. This device has improved channel-to-channel skew, duty cycle distortion and symmetric rise or fall timing for applications requiring strict timing conditions.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, thus preventing damaging current backflow through the device when it is powered down.

The VCC isolation feature is designed so that if either VCC supply is at or near 0V both ports will switch to a high-impedance state. This feature enables power isolation for communications across multiple MACs and PHYs, and is beneficial in situations where MACs and PHYs are powered up asynchronously preventing current backflow between devices.

The TXV0106 transmits data in a fixed direction from the A bus to the B bus. When OE is set to High, both Ax and Bx pins will be forced into a high-impedance state. See Device Functional Modes for a summary of the operation of the control logic.

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Technical documentation

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Type Title Date
* Data sheet TXV0106 6-Bit Fix Direction Low Skew, Low-Jitter Voltage Translator or Buffer datasheet (Rev. A) PDF | HTML 12 Apr 2024
EVM User's guide TXV010xEVM Evaluation Module User's Guide PDF | HTML 05 Feb 2024
Application note Overcoming Design Challenges - Implementing High Performance Interfaces PDF | HTML 12 Dec 2023
Application brief Supporting Time and Skew Sensitive Interfaces with TI's TXV Level-Shifter PDF | HTML 27 Oct 2023
Application brief Enabling Industrial and Automotive Ethernet RGMII Interfaces with Voltage Transl PDF | HTML 02 Aug 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Not available on TI.com
Evaluation board

TXV0106-EVM — TXV0106 evaluation module

The TXV0106 evaluation module (EVM) is an easy-to-use platform to evaluate the functionality and performance of the TXV0106 device. The EVM has optional circuits and jumpers to configure the device for different applications. The device offers options for both fixed and direction control low-skew, (...)
User guide: PDF | HTML
Not available on TI.com
Simulation model

TXV0106 IBIS Model

SCEM797.ZIP (44 KB) - IBIS Model
Package Pins Download
WQFN (BQB) 16 View options

Ordering & quality

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