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UC3824

ACTIVE

30-V, 1.5A double ended PWM controller with 9.2V/8.4V UVLO and 85% duty cycle , 0C to 70C

Product details

Topology Boost, Buck, Secondary side regulator Control mode Current, Voltage Duty cycle (max) (%) 100 Switching frequency (max) (kHz) 1000 Features Error amplifier, Multi-topology, Soft start, Synchronization pin UVLO thresholds on/off (V) 9.2/8.4 Operating temperature range (°C) 0 to 70 Rating Catalog Gate drive (typ) (A) 1.5 Vin (max) (V) 30
Topology Boost, Buck, Secondary side regulator Control mode Current, Voltage Duty cycle (max) (%) 100 Switching frequency (max) (kHz) 1000 Features Error amplifier, Multi-topology, Soft start, Synchronization pin UVLO thresholds on/off (V) 9.2/8.4 Operating temperature range (°C) 0 to 70 Rating Catalog Gate drive (typ) (A) 1.5 Vin (max) (V) 30
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Complementary Outputs
  • Practical Operation Switching Frequencies to 1 MHz
  • 50-ns Propagation Delay to Output
  • High Current Dual Totem Pole Outputs (1.5 A Peak)
  • Wide Bandwidth Error Amplifier
  • Fully Latched Logic With Double Pulse Suppression
  • Pulse-by-Pulse Current Limiting
  • Soft Start/Maximum Duty Cycle Control
  • Under-Voltage Lockout with Hysteresis
  • Low Start Up Current (1.1 mA)
  • Trimmed Bandgap Reference (5.1 V ± 1%)

  • Complementary Outputs
  • Practical Operation Switching Frequencies to 1 MHz
  • 50-ns Propagation Delay to Output
  • High Current Dual Totem Pole Outputs (1.5 A Peak)
  • Wide Bandwidth Error Amplifier
  • Fully Latched Logic With Double Pulse Suppression
  • Pulse-by-Pulse Current Limiting
  • Soft Start/Maximum Duty Cycle Control
  • Under-Voltage Lockout with Hysteresis
  • Low Start Up Current (1.1 mA)
  • Trimmed Bandgap Reference (5.1 V ± 1%)

The UC1824 family of PWM control devices is optimized for high frequency switched mode power supply applications. Particular care was given to minimizing propagation delays through the comparators and logic circuitry while maximizing bandwidth and slew rate of the error amplifier. This controller is designed for use in either current mode or voltage mode systems with the capability for input voltage feed-forward.

Protection circuitry includes a current limit comparator with a 1-V threshold, a TTL compatible shutdown port, and a soft-start pin which doubles as a maximum duty cycle clamp. The logic is fully latched to provide jitter free operation and prohibit multiple pulses at an output. An under-voltage lockout section with 800 mV of hysteresis assures low start up current. During under-voltage lockout, the outputs are high impedance.

The UC1824 family of PWM control devices is optimized for high frequency switched mode power supply applications. Particular care was given to minimizing propagation delays through the comparators and logic circuitry while maximizing bandwidth and slew rate of the error amplifier. This controller is designed for use in either current mode or voltage mode systems with the capability for input voltage feed-forward.

Protection circuitry includes a current limit comparator with a 1-V threshold, a TTL compatible shutdown port, and a soft-start pin which doubles as a maximum duty cycle clamp. The logic is fully latched to provide jitter free operation and prohibit multiple pulses at an output. An under-voltage lockout section with 800 mV of hysteresis assures low start up current. During under-voltage lockout, the outputs are high impedance.

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Technical documentation

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Type Title Date
* Data sheet High Speed PWM Controller datasheet (Rev. A) 08 Jul 2007
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018

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PDIP (N) 16 View options
SOIC (DW) 16 View options

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