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ADC0820-N

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µP-kompatibler A/D-Wandler, 8 Bit, mit Track/Hold-Funktion

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Datenblatt

ADC0820-N

AKTIV
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Produktdetails

Resolution (Bits) 8 Sample rate (max) (ksps) 658 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 8 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 65 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 8 Digital supply (min) (V) 4.5 Digital supply (max) (V) 8
Resolution (Bits) 8 Sample rate (max) (ksps) 658 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 8 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 65 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 8 Digital supply (min) (V) 4.5 Digital supply (max) (V) 8
SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm)
  • Built-In Track-and-Hold Function
  • No Missing Codes
  • No External Clocking
  • Single Supply—5 VDC
  • Easy Interface to All Microprocessors, or Operates Stand-Alone
  • Latched TRI-STATE Output
  • Logic Inputs and Outputs Meet Both MOS and T2L Voltage Level Specifications
  • Operates Ratiometrically or with any Reference Value Equal to or Less than VCC
  • 0V to 5V Analog Input Voltage Range with Single 5V Supply
  • No Zero or Full-Scale Adjust Required
  • Overflow Output Available for Cascading
  • 0.3 in. Standard Width 20-Pin PDIP
  • 20-Pin PLCC
  • 20-Pin SOIC

Key Specifications

  • Resolution: 8 Bits
  • Conversion Time
    • 2.5 µs Max (RD Mode)
    • 1.5 µs Max (WR-RD Mode)
  • Low Power: 75 mW Max
  • Total Unadjusted Error: ±½ LSB and ± 1 LSB

All trademarks are the property of their respective owners.

  • Built-In Track-and-Hold Function
  • No Missing Codes
  • No External Clocking
  • Single Supply—5 VDC
  • Easy Interface to All Microprocessors, or Operates Stand-Alone
  • Latched TRI-STATE Output
  • Logic Inputs and Outputs Meet Both MOS and T2L Voltage Level Specifications
  • Operates Ratiometrically or with any Reference Value Equal to or Less than VCC
  • 0V to 5V Analog Input Voltage Range with Single 5V Supply
  • No Zero or Full-Scale Adjust Required
  • Overflow Output Available for Cascading
  • 0.3 in. Standard Width 20-Pin PDIP
  • 20-Pin PLCC
  • 20-Pin SOIC

Key Specifications

  • Resolution: 8 Bits
  • Conversion Time
    • 2.5 µs Max (RD Mode)
    • 1.5 µs Max (WR-RD Mode)
  • Low Power: 75 mW Max
  • Total Unadjusted Error: ±½ LSB and ± 1 LSB

All trademarks are the property of their respective owners.

By using a half-flash conversion technique, the 8-bit ADC0820-N CMOS A/D offers a 1.5 µs conversion time and dissipates only 75 mW of power. The half-flash technique consists of 32 comparators, a most significant 4-bit ADC and a least significant 4-bit ADC.

The input to the ADC0820-N is tracked and held by the input sampling circuitry eliminating the need for an external sample-and-hold for signals moving at less than 100 mV/µs.

For ease of interface to microprocessors, the ADC0820-N has been designed to appear as a memory location or I/O port without the need for external interfacing logic.

By using a half-flash conversion technique, the 8-bit ADC0820-N CMOS A/D offers a 1.5 µs conversion time and dissipates only 75 mW of power. The half-flash technique consists of 32 comparators, a most significant 4-bit ADC and a least significant 4-bit ADC.

The input to the ADC0820-N is tracked and held by the input sampling circuitry eliminating the need for an external sample-and-hold for signals moving at less than 100 mV/µs.

For ease of interface to microprocessors, the ADC0820-N has been designed to appear as a memory location or I/O port without the need for external interfacing logic.
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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt ADC0820 8-Bit High Speed uP Compatible A/D Converter with Track/Hold Function datasheet (Rev. C) 25.03.2013
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 21.05.2015

Design und Entwicklung

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Designtool

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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