ADS5272

AKTIV

Achtkanaliger Analog-zu-Digital-Wandler (ADC), 12 Bit, 65 MSPS

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Datenblatt

document-pdfAcrobat 8-Channel, 12-Bit, 65MSPS Analog-to-Digital Converter with Serial LVDS Interface datasheet (Rev. C) (Englisch)

ADS5272

AKTIV

Datenblatt

Jetzt bestellen

Produktdetails

Sample rate (max) (Msps)

65

Resolution (Bits)

12

Number of input channels

8

Interface type

Parallel LVDS

Analog input BW (MHz)

300

Features

Low Power

Rating

Catalog

Peak-to-peak input voltage range (V)

2

Power consumption (typ) (mW)

983

Architecture

Pipeline

SNR (dB)

71.2

ENOB (Bits)

11.5

SFDR (dB)

90

Operating temperature range (°C)

-40 to 85

Input buffer

No

Sample rate (max) (Msps)

65

Resolution (Bits)

12

Number of input channels

8

Interface type

Parallel LVDS

Analog input BW (MHz)

300

Features

Low Power

Rating

Catalog

Peak-to-peak input voltage range (V)

2

Power consumption (typ) (mW)

983

Architecture

Pipeline

SNR (dB)

71.2

ENOB (Bits)

11.5

SFDR (dB)

90

Operating temperature range (°C)

-40 to 85

Input buffer

No

HTQFP (PFP)

80

196 mm² (14 mm × 14 mm)

Maximum Sample Rate: 65MSPS
12-Bit Resolution
No Missing Codes
Total Power Dissipation:
Internal Reference: 983mW
External Reference: 917mW
CMOS Technology
Simultaneous Sample-and-Hold
71.1dBFS SNR at 5MHz IF
3.3V Digital/Analog Supply
Serialized LVDS Outputs
Integrated Frame and Bit Patterns
Option to Double LVDS Clock Output Currents
Four Current Modes for LVDS
Pin- and Format-Compatible Family
TQFP-80 PowerPAD Package
APPLICATIONS
- Portable Ultrasound Systems
- Tape Drives
- Test Equipment
- Optical Networking

PowerPAD Is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners

Maximum Sample Rate: 65MSPS
12-Bit Resolution
No Missing Codes
Total Power Dissipation:
Internal Reference: 983mW
External Reference: 917mW
CMOS Technology
Simultaneous Sample-and-Hold
71.1dBFS SNR at 5MHz IF
3.3V Digital/Analog Supply
Serialized LVDS Outputs
Integrated Frame and Bit Patterns
Option to Double LVDS Clock Output Currents
Four Current Modes for LVDS
Pin- and Format-Compatible Family
TQFP-80 PowerPAD Package
APPLICATIONS
- Portable Ultrasound Systems
- Tape Drives
- Test Equipment
- Optical Networking

PowerPAD Is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners

The ADS5272 is a high-performance, 65MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5272 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.

The ADS5272 is a high-performance, 65MSPS, 8-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the eight data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5272 provides internal references, or can optionally be driven with external references. Best performance is achieved through the internal reference mode.

The device is available in a TQFP-80 PowerPAD package and is specified over a -40°C to +85°C operating range.

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Technische Dokumentation

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Top-Dokumentation	Typ	Titel	Datum
*	Datenblatt	8-Channel, 12-Bit, 65MSPS Analog-to-Digital Converter with Serial LVDS Interface datasheet (Rev. C)	06.01.2009
	Anwendungshinweis	Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)	22.05.2015
	Anwendungshinweis	Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)	19.07.2013
	Anwendungshinweis	Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)	10.09.2010
	Anwendungshinweis	Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio	28.04.2009
	Anwendungshinweis	CDCE62005 as Clock Solution for High-Speed ADCs	04.09.2008
	Anwendungshinweis	CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters	08.06.2008
	Anwendungshinweis	Phase Noise Performance and Jitter Cleaning Ability of CDCE72010	02.06.2008
	Anwendungshinweis	Ultrasound Receive Chain Evaluation Module	14.07.2006
	Anwendungshinweis	Interfacing the VCA8613 with High-Speed ADCs	05.04.2005
	Anwendungshinweis	Interfacing the VCA8617 with High-Speed ADCs	05.04.2005
	Anwendungshinweis	Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x	23.02.2005
	Anwendungshinweis	LVDS Outputs on the ADS527x	10.06.2004

Design und Entwicklung

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