The ADS822 and ADS825 are pipeline, CMOS Analog-to-Digital Converters (ADC) that operate from a single +5V power supply. These converters provide excellent performance with a single-ended input and can be operated with a differential input for added spurious performance. These high-performance converters include a 10-bit quantizer, high-bandwidth track-and-hold, and a high-accuracy internal reference. They also allow for the user to disable the internal reference and utilize external references. This external reference option provides excellent gain and offset matching when used in multichannel applications, or in applications where full-scale range adjustment is required.
The ADS822 and ADS825 employ digital error correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for medical imaging, communications, video, and test instrumentation. The ADS822 and ADS825 offer power dissipation of 190mW and also provide a power-down mode, thus reducing power dissipation to only 20mW. The ADS825 is +3V or +5V logic I/O compatible.
The ADS822 and ADS825 are specified at a maximum sampling frequency of 40MSPS and a single-ended input range of 1.5V to 3.5V. The ADS822 and ADS825 are available in an SSOP-28 package and are pin-for-pin compatible with the 10-bit, 60MSPS ADS823 and ADS826, and the 10-bit, 75MSPS ADS828, providing an upgrade path to higher sampling frequencies.
| Top-Dokumentation | Typ | Titel | Format-Optionen | Neueste englische Version herunterladen | Datum |
|---|---|---|---|---|---|
| * | Datenblatt | ADS822, ADS825: 10-Bit, 40MHz Sampling Analog-To-Digital Converter datasheet (Rev. B) | 18.07.2002 | ||
| Anwendungshinweis | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 10.09.2010 | |||
| Anwendungshinweis | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 28.04.2009 | |||
| Anwendungshinweis | CDCE62005 as Clock Solution for High-Speed ADCs | 04.09.2008 | |||
| Anwendungshinweis | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 08.06.2008 | |||
| Anwendungshinweis | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 02.06.2008 | |||
| Analog Design Journal | ADS82x ADC with non-uniform sampling clock | 28.02.2005 |
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Der Rechner für Analogtechniker beschleunigt viele der sich wiederholenden Berechnungen, die Entwickler von analogen Schaltungsdesigns regelmäßig durchführen müssen. Dieses PC-basierte Tool bietet eine grafische Schnittstelle mit einer Liste verschiedener gebräuchlicher Berechnungen. Das Spektrum (...)
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| SSOP (DB) | 28 | Ultra Librarian |
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