Produktdetails

Resolution (Bits) 14 Number of DAC channels 4 Interface type SPI Output type Unbuffered Current INL (max) (±LSB) 1 Settling time (µs) 0.5 Reference type Ext Architecture Multiplying DAC Rating Catalog Features Reset to Mid-Scale, SDO Sample/update rate (Msps) 2 Power consumption (typ) (mW) 0.0275 Operating temperature range (°C) -40 to 85
Resolution (Bits) 14 Number of DAC channels 4 Interface type SPI Output type Unbuffered Current INL (max) (±LSB) 1 Settling time (µs) 0.5 Reference type Ext Architecture Multiplying DAC Rating Catalog Features Reset to Mid-Scale, SDO Sample/update rate (Msps) 2 Power consumption (typ) (mW) 0.0275 Operating temperature range (°C) -40 to 85
SSOP (DB) 28 79.56 mm² (10.2 mm × 7.8 mm)
  • Relative Accuracy: 1 LSB Max
  • Differential Nonlinearity: 1 LSB Max
  • 2-mA Full-Scale Current with VREF = ±10 V
  • 0.5-µs Settling Time
  • Midscale or Zero-Scale Reset
  • Four Separate 4Q Multiplying Reference Inputs
  • Reference Bandwidth: 10 MHz
  • Reference Dynamics: -105 dB THD
  • SPI™-Compatible 3-Wire Interface: 50-MHz
  • Double Buffered Registers Enable
  • Simultaneous Multichannel Update
  • Internal Power-On Reset
  • Compact SSOP-28 Package
  • Industry-Standard Pin Configuration
  • APPLICATIONS
    • Automatic Test Equipment
    • Instrumentation
    • Digitally-Controlled Calibration

SPI is a trademark of Motorola, Inc.
All trademarks are the property of their respective owners.

  • Relative Accuracy: 1 LSB Max
  • Differential Nonlinearity: 1 LSB Max
  • 2-mA Full-Scale Current with VREF = ±10 V
  • 0.5-µs Settling Time
  • Midscale or Zero-Scale Reset
  • Four Separate 4Q Multiplying Reference Inputs
  • Reference Bandwidth: 10 MHz
  • Reference Dynamics: -105 dB THD
  • SPI™-Compatible 3-Wire Interface: 50-MHz
  • Double Buffered Registers Enable
  • Simultaneous Multichannel Update
  • Internal Power-On Reset
  • Compact SSOP-28 Package
  • Industry-Standard Pin Configuration
  • APPLICATIONS
    • Automatic Test Equipment
    • Instrumentation
    • Digitally-Controlled Calibration

SPI is a trademark of Motorola, Inc.
All trademarks are the property of their respective owners.

The DAC8803 is a quad, 14-bit, current-output digital-to-analog converter (DAC) designed to operate from a single +2.7-V to 5-V supply.

The applied external reference input voltage VREF determines the full-scale output current. An internal feedback resistor (RFB) provides temperature tracking for the full-scale output when combined with an external I-to-V precision amplifier.

A doubled buffered serial data interface offers high-speed, 3-wire, SPI and microcontroller compatible inputs using serial data in (SDI), clock (CLK), and a chip select (CS). In addition, a serial data out pin (SDO) allows for daisy chaining when multiple packages are used. A common level-sensitive load DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to zero at system turn on. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1.

The DAC8803 is packaged in an SSOP package.

The DAC8803 is a quad, 14-bit, current-output digital-to-analog converter (DAC) designed to operate from a single +2.7-V to 5-V supply.

The applied external reference input voltage VREF determines the full-scale output current. An internal feedback resistor (RFB) provides temperature tracking for the full-scale output when combined with an external I-to-V precision amplifier.

A doubled buffered serial data interface offers high-speed, 3-wire, SPI and microcontroller compatible inputs using serial data in (SDI), clock (CLK), and a chip select (CS). In addition, a serial data out pin (SDO) allows for daisy chaining when multiple packages are used. A common level-sensitive load DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to zero at system turn on. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1.

The DAC8803 is packaged in an SSOP package.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt Quad, Serial Input 14-Bit Multiplying DAC datasheet (Rev. C) 03.02.2006
Anwendungshinweis Interfacing the DAC8803EVM to TMS470 Processors 28.06.2006

Design und Entwicklung

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Evaluierungsplatine

DAC8803EVM — DAC8803-Evaluierungsmodul

The EVM allows complete performance and operational analysis of the DAC8803 device. The design includes four external buffers and DPDT switches to allow unipolar and bipolar output operation. The DAC8803EVM is designed in TI modular form factor. This form factor permits connection to several TI (...)

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DXP — DXP EVM GUI

Das DAC Exerciser Program (DXP) ist ein Softwaretool von Texas Instruments zur Evaluierung von DACs ohne die Anforderungen teurer Mustergeneratoren oder des Schreibens komplexer Software. In Verbindung mit einem DAC-EVM von Texas Instruments und einer modularen Hauptplatine ermöglicht es die (...)

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Simulationsmodell

DAC8803 IBIS Model

SBAM062.ZIP (28 KB) - IBIS-Modell
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Designtool

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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SSOP (DB) 28 Ultra Librarian

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