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LM25115A

AKTIV

Sekundärseitiger Post-Regulator/Synchron-Abwärtsregler, 42 V, mit Power-Up/Power-Down-Tracking

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Datenblatt

LM25115A

AKTIV
Datenblatt Jetzt bestellen

Produktdetails

Rating Catalog Topology Buck Controller Iout (max) (A) 10 Vin (max) (V) 42 Vin (min) (V) 4.5 Vout (max) (V) 13.5 Vout (min) (V) 0.75 Control mode current mode Features Frequency synchronization Duty cycle (max) (%) 85 Iq (typ) (A) 0.004 Number of phases 1 Operating temperature range (°C) -40 to 125
Rating Catalog Topology Buck Controller Iout (max) (A) 10 Vin (max) (V) 42 Vin (min) (V) 4.5 Vout (max) (V) 13.5 Vout (min) (V) 0.75 Control mode current mode Features Frequency synchronization Duty cycle (max) (%) 85 Iq (typ) (A) 0.004 Number of phases 1 Operating temperature range (°C) -40 to 125
TSSOP (PW) 16 32 mm² 5 x 6.4
  • Power-up/Power-down Tracking
  • Self-synchronization to Main Channel Output
  • Leading Edge Pulse Width Modulation
  • Valley Current Mode Control
  • Standalone DC/DC Synchronous Buck Mode
  • Operates from AC or DC Input up to 42V
  • Wide 4.5V to 30V Bias Supply Range
  • Wide 0.75V to 13.5V Output Range.
  • Top and Bottom Gate Drivers Sink 2.5A Peak
  • Adaptive Gate Driver Dead-time Control
  • Wide Bandwidth Error Amplifier (4MHz)
  • Programmable Soft-start
  • Thermal Shutdown Protection
  • TSSOP-16 package

All trademarks are the property of their respective owners.

  • Power-up/Power-down Tracking
  • Self-synchronization to Main Channel Output
  • Leading Edge Pulse Width Modulation
  • Valley Current Mode Control
  • Standalone DC/DC Synchronous Buck Mode
  • Operates from AC or DC Input up to 42V
  • Wide 4.5V to 30V Bias Supply Range
  • Wide 0.75V to 13.5V Output Range.
  • Top and Bottom Gate Drivers Sink 2.5A Peak
  • Adaptive Gate Driver Dead-time Control
  • Wide Bandwidth Error Amplifier (4MHz)
  • Programmable Soft-start
  • Thermal Shutdown Protection
  • TSSOP-16 package

All trademarks are the property of their respective owners.

The LM25115A controller contains all of the features necessary to produce multiple tracking outputs using the Secondary Side Post Regulation (SSPR) technique. The SSPR technique develops a highly efficient and well regulated auxiliary output from the secondary side switching waveform of an isolated power converter. LM25115A can be also used as a standalone DC/DC synchronous buck controller (Refer to section). Regulation of the auxiliary output voltage is achieved by leading edge pulse width modulation (PWM) of the main channel duty cycle. Leading edge modulation is compatible with either current mode or voltage mode control of the main output. The LM25115A drives external high-side and low-side NMOS power switches configured as a synchronous buck regulator. A current sense amplifier provides overload protection and operates over a wide common mode input range. Additional features include a low dropout (LDO) bias regulator, error amplifier, precision reference, adaptive dead time control of the gate signals and thermal shutdown.

The LM25115A controller contains all of the features necessary to produce multiple tracking outputs using the Secondary Side Post Regulation (SSPR) technique. The SSPR technique develops a highly efficient and well regulated auxiliary output from the secondary side switching waveform of an isolated power converter. LM25115A can be also used as a standalone DC/DC synchronous buck controller (Refer to section). Regulation of the auxiliary output voltage is achieved by leading edge pulse width modulation (PWM) of the main channel duty cycle. Leading edge modulation is compatible with either current mode or voltage mode control of the main output. The LM25115A drives external high-side and low-side NMOS power switches configured as a synchronous buck regulator. A current sense amplifier provides overload protection and operates over a wide common mode input range. Additional features include a low dropout (LDO) bias regulator, error amplifier, precision reference, adaptive dead time control of the gate signals and thermal shutdown.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet Secondary Side Post Regulator/DC-DC Converter with Power-Up/Pwr-Down Trac datasheet (Rev. B) 01 Apr 2013
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018
Analog Design Journal Reduce buck-converter EMI and voltage stress by minimizing inductive parasitics 21 Jul 2016
Application note Minimizing FET Losses For a High Input Rail Buck Converter (Rev. A) 23 Apr 2013

Design und Entwicklung

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
TSSOP (PW) 16 Ultra Librarian
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