Gehäuseinformationen
| Gehäuse | Pins LCCC (FK) | 20 |
| Betriebstemperaturbereich (°C) -55 to 125 |
| Gehäusemenge | Träger 55 | TUBE |
Merkmale von SN54ALS112A
- Fully Buffered to Offer Maximum Isolation From External Disturbance
- Package Options Include Plastic Small-Outline (D) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
Beschreibung von SN54ALS112A
These devices contain two independent J-K negative-edge-triggered
flip-flops. A low level at the preset (
) or clear (
) inputs sets or resets the
outputs, regardless of the levels of the other inputs. When and are inactive (high), data at the J
and K inputs meeting the setup-time requirements is transferred to
the outputs on the negative-going edge of the clock pulse (CLK).
Clock triggering occurs at a voltage level and is not directly
related to the fall time of the clock pulse. Following the hold-time
interval, data at the J and K inputs may be changed without affecting
the levels at the outputs. These versatile flip-flops can perform as
toggle flip-flops by tying J and K high.
The SN54ALS112A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS112A is characterized for operation from 0°C to 70°C.