Gehäuseinformationen
| Gehäuse | Pins LCCC (FK) | 20 |
| Betriebstemperaturbereich (°C) -55 to 125 |
| Gehäusemenge | Träger 55 | TUBE |
Merkmale von SN54LVC00A
- ESD protection exceeds JESD 22
- 2000V Human-Body Model
- 1000V Charged-Device Model
- SN74LVC00A operates from 1.65V to 3.6V
- SN54LVC00A operates from 2V to 3.6V
- SNx4LVC00A specified from –40°C to +85°C and –40°C to +125°C
- SN54LVC00A specified from –55°C to +125°C
- Inputs accept voltages to 5.5V
- Max tpd of 4.3ns at 3.3V
- Typical VOLP (output ground bounce) < 0.8V at VCC = 3.3V, TA = 25°C
- Typical VOHV (output VOH undershoot) > 2V at VCC = 3.3V, TA = 25°C
- Latch-up performance exceeds 250 mA per JESD 17
- On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
Beschreibung von SN54LVC00A
The SN54LVC00A quadruple 2-input positive-NAND gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC00A quadruple 2-input positive-NAND gate is designed for 1.65V to 3.6V VCC operation.
The SNx4LVC00A devices perform the Boolean function Y = A • B or Y = A + B in positive logic.
Inputs can be driven from either 3.3V or 5V devices. This feature allows the use of these devices as translators in a mixed 3.3V/5V system environment.