Gehäuseinformationen
| Gehäuse | Pins SOIC (DW) | 20 |
| Betriebstemperaturbereich (°C) 0 to 70 |
| Gehäusemenge | Träger 2.000 | LARGE T&R |
Merkmale von SN74ALS573C
- 3-State Buffer-Type Outputs Drive Bus Lines Directly
- Bus-Structured Pinout
- True Logic Outputs
- Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N) and Ceramic (J) 300-mil DIPs, and Ceramic Flat (W) Packages
Beschreibung von SN74ALS573C
These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, outputs (Q) respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.
A buffered output-enable (
) input can be used to place the eight outputs in either
a normal logic state (high or low) or a high-impedance state. In the
high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and the increased drive
provide the capability to drive bus lines without interface or pullup
components.
does not affect
internal operation of the latches. Old data can be retained or new
data can be entered while the outputs are in the high-impedance
state.
The SN54ALS573C and SN54AS573A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS573C and SN74AS573A are characterized for operation from 0°C to 70°C.