2V to 5.5V VCC Operation
Typical VOLP (Output Ground Bounce) <0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot) 2.3V at VCC = 3.3V, TA = 25°C
Support Mixed-Mode Voltage Operation on All Ports
High On-Off Output-Voltage Ratio
Low Crosstalk Between Switches
Individual Switch Controls
Extremely Low Input Current
Ioff Supports Partial-Power-Down Mode Operation
Operating ambient temperature: -55°C to +125°C
Supports defense and aerospace applications:
- Controlled baseline
- One assembly and test site
- One fabrication site
- Extended product life cycle
- Product traceability

2V to 5.5V VCC Operation
Typical VOLP (Output Ground Bounce) <0.8V at VCC = 3.3V, TA = 25°C
Typical VOHV (Output VOH Undershoot) 2.3V at VCC = 3.3V, TA = 25°C
Support Mixed-Mode Voltage Operation on All Ports
High On-Off Output-Voltage Ratio
Low Crosstalk Between Switches
Individual Switch Controls
Extremely Low Input Current
Ioff Supports Partial-Power-Down Mode Operation
Operating ambient temperature: -55°C to +125°C
Supports defense and aerospace applications:
- Controlled baseline
- One assembly and test site
- One fabrication site
- Extended product life cycle
- Product traceability

The SN74LV4040B-EP is a 12-bit asynchronous binary counters with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits.

The SN74LV4040B-EP is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when powered down.

The SN74LV4040B-EP is a 12-bit asynchronous binary counters with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits.

The SN74LV4040B-EP is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when powered down.

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	Typ	Titel		Datum
*	Data sheet	SN74LV4040B-EP Enhanced Product, 12-Bit Asynchronous Binary Counters datasheet (Rev. A)	PDF \| HTML	05 Aug 2025
*	Radiation & reliability report	SN74LV4040B-EP Enhanced Product Qualification and Reliability Report	PDF \| HTML	09 Okt 2024

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SN74LV4040B-EP

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SN74LV4040B-EP

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