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SN74LVCZ16244A

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16-Kanal-Puffer, 2,7 bis 3,6 V mit Tri-State-Ausgängen

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Datenblatt

SN74LVCZ16244A

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Datenblatt Jetzt bestellen

Produktdetails

Technology family LVC Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 100 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Damping resistors, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family LVC Number of channels 16 IOL (max) (mA) 24 Supply current (max) (µA) 100 IOH (max) (mA) -24 Input type Standard CMOS Output type 3-State Features Balanced outputs, Damping resistors, Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 85
SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm) TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm) TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • Member of the Texas Instruments Widebus™ Family
  • Operates From 2.7 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.1 ns at 3.3 V
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.
  • Member of the Texas Instruments Widebus™ Family
  • Operates From 2.7 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.1 ns at 3.3 V
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

Widebus is a trademark of Texas Instruments.

This 16-bit buffer/driver is designed for 2.7-V to 3.6-V VCC operation.

The SN74LVCZ16244A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

During power up or power down when VCC is between 0 and 1.5 V, the device is in the high-impedance state. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down (VCC = 0 V). The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

This 16-bit buffer/driver is designed for 2.7-V to 3.6-V VCC operation.

The SN74LVCZ16244A is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

During power up or power down when VCC is between 0 and 1.5 V, the device is in the high-impedance state. However, to ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down (VCC = 0 V). The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt 16-Bit Buffer/Driver With 3-State Outputs datasheet (Rev. D) 06.09.2002

Design und Entwicklung

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Simulationsmodell

SN74LVCZ16244A IBIS Model

SCEM273.ZIP (29 KB) - IBIS-Modell
Unterstützte Produkte und Hardware
Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
SSOP (DL) 48 Ultra Librarian
TVSOP (DGV) 48 Ultra Librarian
TSSOP (DGG) 48 Ultra Librarian
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