TDA2EG-17

AKTIV

SoC-Prozessoren mit Grafik- und Videobeschleunigung für ADAS-Anwendungen (17 mm Gehäuse)

Produktdetails

CPU 1 Arm Cortex-A15 Frequency (MHz) 500, 800 Coprocessors 4 Arm Cortex-M4 Graphics acceleration 1 2D, 1 3D Display type 1 HDMI, 2 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
CPU 1 Arm Cortex-A15 Frequency (MHz) 500, 800 Coprocessors 4 Arm Cortex-M4 Graphics acceleration 1 2D, 1 3D Display type 1 HDMI, 2 LCD Protocols Ethernet PCIe 2 PCIe Gen 3 Hardware accelerators Image video accelerator Features Vision Analytics Operating system Android, Linux, RTOS Security Cryptographic acceleration, Device attestation & anti-counterfeit, Hardware-enforced isolation, Secure boot, Secure debug, Secure storage, Software IP protection Rating Automotive Operating temperature range (°C) -40 to 125 Edge AI enabled No
FCCSP (CBD) 538 289 mm² (17 mm × 17 mm)
  • Architecture designed for ADAS applications
  • Video, image, and graphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) interconnects
  • DDR3/DDR3L Memory Interface (EMIF) module
    • Supports up to DDR-1333 (667 MHz)
    • Up to 2GB across single chip select
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller With DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • Single-core PowerVR™ SGX544 3D GPU
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-port gigabit ethernet (GMAC)
    • Up to two external ports
  • Sixteen 32-bit general-purpose timers
  • 32-Bit MPU watchdog timer
  • Six high-speed inter-integrated circuit (I2C) ports
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI Interface (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High-speed USB 2.0 dual-role device
  • High-speed USB 2.0 on-the-go
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • PCI Express® 3.0 port with integrated PHY
    • One 2-lane Gen2-compliant port
    • or Two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • MIPI® CSI-2 camera serial interface
  • Up to 186 General-Purpose I/O (GPIO) pins
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG lock
    • Secure keys
    • Secure ROM and boot
    • Customer programmable keys
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 17 mm × 17 mm, 0.65-mm pitch, 538-pin BGA (CBD)
  • Architecture designed for ADAS applications
  • Video, image, and graphics processing support
    • Full-HD video (1920 × 1080p, 60 fps)
    • Multiple video input and video output
  • Arm® Cortex®-A15 microprocessor subsystem
  • C66x floating-point VLIW DSP
    • Fully object-code compatible with C67x and C64x+
    • Up to thirty-two 16 × 16-bit fixed-point multiplies per cycle
  • Up to 512KB of on-chip L3 RAM
  • Level 3 (L3) and Level 4 (L4) interconnects
  • DDR3/DDR3L Memory Interface (EMIF) module
    • Supports up to DDR-1333 (667 MHz)
    • Up to 2GB across single chip select
  • Dual Arm® Cortex®-M4 Image Processing Units (IPU)
  • IVA-HD subsystem
  • Display subsystem
    • Display controller With DMA engine and up to three pipelines
    • HDMI™ encoder: HDMI 1.4a and DVI 1.0 compliant
  • Single-core PowerVR™ SGX544 3D GPU
  • 2D-graphics accelerator (BB2D) subsystem
    • Vivante® GC320 core
  • Video Processing Engine (VPE)
  • One Video Input Port (VIP) module
    • Support for up to four multiplexed input ports
  • General-Purpose Memory Controller (GPMC)
  • Enhanced Direct Memory Access (EDMA) controller
  • 2-port gigabit ethernet (GMAC)
    • Up to two external ports
  • Sixteen 32-bit general-purpose timers
  • 32-Bit MPU watchdog timer
  • Six high-speed inter-integrated circuit (I2C) ports
  • Ten configurable UART/IrDA/CIR modules
  • Four Multichannel Serial Peripheral Interfaces (McSPI)
  • Quad SPI Interface (QSPI)
  • Eight Multichannel Audio Serial Port (McASP) modules
  • SuperSpeed USB 3.0 dual-role device
  • High-speed USB 2.0 dual-role device
  • High-speed USB 2.0 on-the-go
  • Four MultiMedia Card/Secure Digital/Secure Digital Input Output Interfaces (MMC™/SD®/SDIO)
  • PCI Express® 3.0 port with integrated PHY
    • One 2-lane Gen2-compliant port
    • or Two 1-lane Gen2-compliant ports
  • Dual Controller Area Network (DCAN) modules
    • CAN 2.0B protocol
  • MIPI® CSI-2 camera serial interface
  • Up to 186 General-Purpose I/O (GPIO) pins
  • Device security features
    • Hardware crypto accelerators and DMA
    • Firewalls
    • JTAG lock
    • Secure keys
    • Secure ROM and boot
    • Customer programmable keys
  • Power, reset, and clock management
  • On-chip debug with CTools technology
  • 28-nm CMOS technology
  • 17 mm × 17 mm, 0.65-mm pitch, 538-pin BGA (CBD)

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.

The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.

Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.

The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.

Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.

The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore™ and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.

Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.

TI’s new TDA2Ex System-on-Chip (SoC) is a highly optimized and scalable family of devices designed to meet the requirements of leading Advanced Driver Assistance Systems (ADAS). The TDA2Ex family enables broad ADAS applications in today’s automobile by integrating an optimal mix of performance, low power, and ADAS vision analytics processing that aims to facilitate a more autonomous and collision-free driving experience.

The TDA2Ex SoC enables sophisticated embedded vision technology in today’s automobile by enabling a board range of ADAS applications including park assist, surround view and sensor fusion on a single architecture.

The TDA2Ex SoC incorporates a heterogeneous, scalable architecture that includes a mix of TI’s fixed and floating-point TMS320C66x digital signal processor (DSP) generation core, Arm Cortex-A15 MPCore and dual-Cortex-M4 processors. The integration of a video accelerator for decoding multiple video streams over an Ethernet AVB network, along with graphics accelerator for rendering virtual views, enable a 3D viewing experience. The TDA2Ex SoC also integrates a host of peripherals including multicamera interfaces (both parallel and serial, including CSI-2) to enable Ethernet or LVDS-based surround view systems, displays and GigB Ethernet AVB.

Additionally, TI provides a complete set of development tools for the Arm and DSP, including C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a debugging interface for visibility into source code execution.

Cryptographic acceleration is available in all devices. All other supported security features, including support for secure boot, debug security and support for trusted execution environment are available on High-Security (HS) devices. For more information about HS devices, contact your TI representative.

The TDA2Ex ADAS processor is qualified according to the AEC-Q100 standard.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt TDA2Ex SoC for Advanced Driver Assistance Systems (ADAS) 17mm Package (CBD Package) datasheet (Rev. G) PDF | HTML 25.11.2019
* Benutzerhandbuch TDA2Ex SoC for Advanced Driver Assistance Systems (ADAS) TRM (Rev. D) 21.05.2019
* Errata TDA2x ADAS Applications Processor (Rev. K) PDF | HTML 08.09.2024
Anwendungshinweis Integrating virtual DRM between VISION SDK and PSDK on Jacinto6 SOC PDF | HTML 05.05.2021
Anwendungshinweis IVA-HD Sharing Between VISION-SDK and PSDKLA on Jacinto6 SoC PDF | HTML 24.08.2020
Whitepaper Stereo vision- facing the challenges and seeing the opportunities for ADAS (Rev. A) 24.07.2020
Whitepaper Paving the way to self-driving cars with ADAS (Rev. A) 24.07.2020
Anwendungshinweis AM57x, DRA7x, and TDA2x EMIF Tools (Rev. E) 06.01.2020
Anwendungshinweis Integrating New Cameras With Video Input Port on DRA7xx SoCs PDF | HTML 11.06.2019
Anwendungshinweis TDA2x/TDA2E Performance (Rev. A) PDF | HTML 10.06.2019
Anwendungshinweis The Implementation of YUV422 Output for SRV 02.08.2018
Anwendungshinweis MMC DLL Tuning (Rev. B) 31.07.2018
Anwendungshinweis Integrating AUTOSAR on TI SoC: Fundamentals 18.06.2018
Anwendungshinweis ECC/EDC on TDAxx (Rev. B) 13.06.2018
Anwendungshinweis Sharing VPE Between VISIONSDK and PSDKLA 04.05.2018
Anwendungshinweis TMS320C66x XMC Memory Protection 31.01.2018
Anwendungshinweis DSS Bit Exact Output (Rev. A) 12.01.2018
Anwendungshinweis Flashing Utility - mflash 09.01.2018
Anwendungshinweis Optimizing DRA7xx and TDA2xx Processors for use with Video Display SERDES (Rev. B) 07.11.2017
Anwendungshinweis A Guide to Debugging With CCS on the DRA75x, DRA74x, TDA2x and TDA3x Family of D (Rev. B) 03.11.2017
Anwendungshinweis DSS BT656 Workaround for TDA2x (Rev. A) 03.11.2017
Informationen zur funktionalen Sicherheit Safety Features on VisionSDK 26.10.2017
Anwendungshinweis Optimization of GPU-Based Surround View on TI’s TDA2x SoC 12.09.2017
Whitepaper Step into next-gen architectures for multi-camera operations in automobiles 16.06.2017
Whitepaper Making Cars Safer Through Technology Innovation (Rev. A) 07.06.2017
Anwendungshinweis Quality of Service (QoS) Knobs for DRA74x, DRA75x & TDA2x Family of Devices (Rev. A) 15.12.2016
Anwendungshinweis Quad Channel Camera Application for Surround View and CMS Camera Systems (Rev. A) 23.08.2016
Anwendungshinweis ADAS Power Management 07.03.2016
Whitepaper Multicore SoCs stay a step ahead of SoC FPGAs 23.02.2016
Benutzerhandbuch Vision Application Board User's Guide 09.02.2016
Whitepaper Surround view camera systems for ADAS (Rev. A) 20.10.2015
Anwendungshinweis Guide to fix Perf Issues Using QoS Knobs for DRA74x, DRA75x, TDA2x & TD3x Device 13.08.2014
Whitepaper TI Vision SDK, Optimized Vision Libraries for ADAS Systems 14.04.2014
Whitepaper TI Gives Sight to Vision-Enabled Automotive Technologies 16.10.2013

Design und Entwicklung

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Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
FCCSP (CBD) 538 Ultra Librarian

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