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TLC6C5912-Q1

AKTIV

Power-Logic- 12-Bit-Schieberegister-LED-Treiber für Fahrzeuganwendungen

Produktdetails

Number of channels 12 Topology Open drain Rating Automotive Operating temperature range (°C) -40 to 125 Vin (min) (V) 3 Vin (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 40 Iout (max) (A) 0.6 Features Thermal shutdown
Number of channels 12 Topology Open drain Rating Automotive Operating temperature range (°C) -40 to 125 Vin (min) (V) 3 Vin (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 40 Iout (max) (A) 0.6 Features Thermal shutdown
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Qualified for Automotive Applications
  • Wide VCC Range from 3 V to 5.5 V
  • Output Maximum Rating of 40 V
  • Twelve Power DMOS Transistor Outputs of
    50-mA Continuous Current With VCC = 5 V
  • Thermal Shutdown Protection
  • Enhanced Cascading for Multiple Stages
  • All Registers Cleared With Single Input
  • Low Power Consumption
  • Slow Switching Time (tr and tf), Which Helps Significantly With Reducing EMI
  • 20-Pin TSSOP-PW Package
  • 20-Pin DW Package
  • Qualified for Automotive Applications
  • Wide VCC Range from 3 V to 5.5 V
  • Output Maximum Rating of 40 V
  • Twelve Power DMOS Transistor Outputs of
    50-mA Continuous Current With VCC = 5 V
  • Thermal Shutdown Protection
  • Enhanced Cascading for Multiple Stages
  • All Registers Cleared With Single Input
  • Low Power Consumption
  • Slow Switching Time (tr and tf), Which Helps Significantly With Reducing EMI
  • 20-Pin TSSOP-PW Package
  • 20-Pin DW Package

The TLC6C5912-Q1 is a monolithic, medium-voltage, low-current power 12-bit shift register designed for use in systems that require relatively moderate load power, such as LEDs.

This device contains a 12-bit serial-in, parallel-out shift register that feeds a 12-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is high. A low on CLR clears all registers in the device. Holding the output enable (G) high holds all data in the output buffers low, and all drain outputs are off. Holding G low makes data from the storage register transparent to the output buffers.

When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The serial output (SER OUT) clocks out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This provides improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference. The device contains a built-in thermal shutdown protection.

Outputs are low-side, open-drain DMOS transistors with output ratings of 40 V and 50-mA continuous sink-current capabilities when VCC = 5 V. The current limit decreases as the junction temperature increases for additional device protection. The device also provides up to 2000 V of ESD protection when tested using the human-body model and 200 V when tested using the machine model.

The TLC6C5912-Q1 characterization is for operation over the operating ambient temperature range of −40°C to 125°C.

The TLC6C5912-Q1 is a monolithic, medium-voltage, low-current power 12-bit shift register designed for use in systems that require relatively moderate load power, such as LEDs.

This device contains a 12-bit serial-in, parallel-out shift register that feeds a 12-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is high. A low on CLR clears all registers in the device. Holding the output enable (G) high holds all data in the output buffers low, and all drain outputs are off. Holding G low makes data from the storage register transparent to the output buffers.

When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The serial output (SER OUT) clocks out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This provides improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference. The device contains a built-in thermal shutdown protection.

Outputs are low-side, open-drain DMOS transistors with output ratings of 40 V and 50-mA continuous sink-current capabilities when VCC = 5 V. The current limit decreases as the junction temperature increases for additional device protection. The device also provides up to 2000 V of ESD protection when tested using the human-body model and 200 V when tested using the machine model.

The TLC6C5912-Q1 characterization is for operation over the operating ambient temperature range of −40°C to 125°C.

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Technische Dokumentation

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Typ Titel Datum
* Data sheet TLC6C5912-Q1 Power Logic 12-Channel Shift Register LED Driver datasheet (Rev. C) PDF | HTML 22 Jul 2016
Application note TLC6C598-Q1, TLC6C5912-Q1 Shift Register LED Driver Application 04 Jun 2015
User guide TLC6C598-Q1 and TLC6C5912-Q1 Reference Design 29 Nov 2012

Design und Entwicklung

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Simulationsmodell

TLC6C5912 IBIS MODEL

SLIM332.ZIP (46 KB) - IBIS Model
Simulationsmodell

TLC6C5912 Unencrypted PSpice Transient Model Package (Rev. B)

SLIM312B.ZIP (34 KB) - PSpice Model
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Referenzdesigns

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Gehäuse Pins Herunterladen
SOIC (DW) 20 Optionen anzeigen
TSSOP (PW) 20 Optionen anzeigen

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