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Digital-Analog-Wandler (DACs)
Präzisions-DACs (≤ 10 MSPS)

TLV5629

AKTIV

DAC, 8 Bit, 8 Kanäle, 1/3 us Eingang, Einschwingzeit/Stromverbrauch programmierbar, energieeffizient

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Selbe Funktionalität wie der verglichene Baustein bei abweichender Anschlussbelegung.
DAC43508 AKTIV Achtfach-DAC mit 8 Bit, gepuffertem Spannungsausgang und SPI Lower power, smaller 3mm × 3mm QFN package

TLV5629

AKTIV
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Produktdetails

Resolution (Bits) 8 Number of DAC channels 8 Interface type SPI Output type Buffered Voltage Output voltage range (V) 0 to 5 INL (max) (±LSB) 1 Settling time (µs) 1 Reference type Ext Architecture String Rating Catalog Sample/update rate (Msps) 0.283 Power consumption (typ) (mW) 18 Operating temperature range (°C) -40 to 85 Product type General-purpose DAC
Resolution (Bits) 8 Number of DAC channels 8 Interface type SPI Output type Buffered Voltage Output voltage range (V) 0 to 5 INL (max) (±LSB) 1 Settling time (µs) 1 Reference type Ext Architecture String Rating Catalog Sample/update rate (Msps) 0.283 Power consumption (typ) (mW) 18 Operating temperature range (°C) -40 to 85 Product type General-purpose DAC
SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm)
  • Eight Voltage Output DACs in One Package
    • TLV5610 . . . 12-Bit
    • TLV5608 . . . 10-Bit
    • TLV5629 . . . 8-Bit
  • Programmable Settling Time vs Power
    Consumption
    • 1 µs In Fast Mode
    • 3 µs In Slow Mode
  • Compatible With TMS320 and SPI Serial Ports
  • Monotonic Over Temperature
  • Low Power Consumption:
    • 18 mW In Slow Mode at 3-V
    • 48 mW In Fast Mode at 3-V
  • Reference Input Buffers
  • Power-Down Mode
  • Buffered, High Impedance Reference Inputs
  • Data Output for Daisy-Chaining
  • APPLICATIONS
    • Digital Servo Control Loops
    • Digital Offset and Gain Adjustment
    • Industrial Process Control
    • Machine and Motion Control Devices
    • Mass Storage Devices
  • Eight Voltage Output DACs in One Package
    • TLV5610 . . . 12-Bit
    • TLV5608 . . . 10-Bit
    • TLV5629 . . . 8-Bit
  • Programmable Settling Time vs Power
    Consumption
    • 1 µs In Fast Mode
    • 3 µs In Slow Mode
  • Compatible With TMS320 and SPI Serial Ports
  • Monotonic Over Temperature
  • Low Power Consumption:
    • 18 mW In Slow Mode at 3-V
    • 48 mW In Fast Mode at 3-V
  • Reference Input Buffers
  • Power-Down Mode
  • Buffered, High Impedance Reference Inputs
  • Data Output for Daisy-Chaining
  • APPLICATIONS
    • Digital Servo Control Loops
    • Digital Offset and Gain Adjustment
    • Industrial Process Control
    • Machine and Motion Control Devices
    • Mass Storage Devices

The TLV5610, TLV5608, and TLV5629 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.

Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs, and a data output which can be used to cascade multiple devices.

The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the supply voltage.

Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and TSSOP packages.

The TLV5610, TLV5608, and TLV5629 are pin-compatible, eight-channel, 12-/10-/8-bit voltage output DACs each with a flexible serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is programmed with a 16-bit serial string containing 4 control and 12 data bits.

Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs, and a data output which can be used to cascade multiple devices.

The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the supply voltage.

Implemented with a CMOS process, the DACs are designed for single-supply operation from 2.7 V to 5.5 V, and can operate on two separate analog and digital power supplies. The devices are available in 20-pin SOIC and TSSOP packages.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt 8-Channel, 12-/10-/8-Bit, 2.7-V to 5.5-V, Low Pwr DAC with Pwr Dwn datasheet (Rev. G) 14.11.2008

Design und Entwicklung

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Designtool

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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SOIC (DW) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
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