Información de empaque
| Encapsulado | Pines FCCSP (ABV) | 135 |
| Rango de temperatura de funcionamiento (℃) -40 to 85 |
| Cant. de paquetes | Transportador 1,000 | LARGE T&R |
Características para DS280DF810
- Octal-channel multi-rate retimer with integrated signal conditioning
- All channels lock independently from 20.2Gbps to 28.4Gbps (including sub-rates like 10.1376Gbps, 10.3125Gbps, 12.5Gbps, and more)
- Ultra-low latency: <500 ps typical for 28.4Gbps data rate
- Single power supply, No Low-Jitter Reference Clock Required, and Integrated AC coupling capacitors to reduce board routing complexity and BOM cost
- Integrated 2×2 cross point
- Adaptive continuous time linear equalizer (CTLE)
- Adaptive decision feedback equalizer (DFE)
- Low-jitter transmitter with 3-Tap FIR Filter
- Combined equalization supporting 35+dB channel loss at 12.9GHz; 30+dB channel loss at 14GHz
- Adjustable transmit amplitude: 205mVppd to 1225mVppd (typical)
- On-chip eye opening monitor (EOM), PRBS pattern checker/generator
- Small 8.00mm × 13.00mm BGA package with easy flow-through routing
- Unique pinout allows routing high-speed signals underneath the package
- Pin-compatible repeater available
- Extended temperature range: −40 °C to 85 °C
Descripción de DS280DF810
The DS280DF810 is an eight-channel multi-rate Retimer with integrated signal conditioning. It is used to extend the reach and robustness of long, lossy, crosstalk-impaired high-speed serial links while achieving a bit error rate (BER) of 10-15 or less.
Each channel of the DS280DF810 independently locks to serial data rates in a continuous range from 20.2Gbps to 28.4Gbps or to any supported sub-rate (÷2 and ÷4), including key data rates such as 10.1376Gbps, 10.3125Gbps, and 12.5Gbps, which allows the DS280DF810 to support individual lane Forward Error Correction (FEC) pass-through.
Integrated physical AC coupling capacitors (TX and RX) eliminate the need for external capacitors on the PCB. The DS280DF810 has a single power supply and minimal need for external components. These features reduce PCB routing complexity and BOM cost.
The advanced equalization features of the DS280DF810 include a low-jitter 3-tap transmit finite impulse response (FIR) filter, an adaptive continuous-time linear equalizer (CTLE), and an adaptive decision feedback equalizer (DFE). This enables reach extension for lossy interconnect and backplanes with multiple connectors and crosstalk. The integrated CDR function is an excellent choice for front-port optical module applications to reset the jitter budget and retimer the high-speed serial data. The DS280DF810 implements 2x2 cross-point on each channel pair, providing the host with both lane crossing and fanout options.
The DS280DF810 can be configured either via the SMBus or through an external EEPROM. Up to 16 devices can share a single EEPROM. A non-disruptive on-chip eye monitor and a PRBS generator and checker allow for in-system diagnostics.