Detalles del producto

Output type AC-LVPECL, HS-LVDS, LP-HCSL, LVDS Stability (ppm) +/-25 Operating temperature range (°C) -40 to 105 Jitter (ps) 0.053
Output type AC-LVPECL, HS-LVDS, LP-HCSL, LVDS Stability (ppm) +/-25 Operating temperature range (°C) -40 to 105 Jitter (ps) 0.053
— (—) See data sheet
  • AEC Q-200 qualified:
    • Device temperature grade 2: –40°C to +105°C
  • Output frequency:
    • Initial frequency offerings: 50, 100, 125, 156.25, 312.5, 625, 1250MHz
    • Other fixed frequencies on request
  • Output formats:
    • LP-HCSL: 50MHz to 625MHz
      • VOH options of 750mV or 850mV
    • LVDS, HS-LVDS, AC-LVPECL: 50MHz to 1250MHz
      • Output swing: 700mVppd to 2Vppd for 3.3V and 700mVppd to 1.6Vppd for 2.5V in 100mVppd step size
      • VCM LVDS, HS-LVDS = 1.2V and VCM AC-LVPECL = VDD/2
  • Ultra-low jitter:
    • 53fs typical RMS jitter at 156.25MHz LP-HCSL output
    • 41fs typical RMS jitter at 312.5MHz LP-HCSL output
    • 45fs typical RMS jitter at 312.5MHz HS-LVDS (1.2Vppd) output
  • Supports PCIe Gen 1 to Gen 7
  • Less than –78dBc spurs for 156.25MHz LP-HCSL PSRR performance (ripple frequencies greater than 10kHz, 50mV supply ripple, 0.1µF decoupling capacitor)
  • ±25ppm frequency accuracy (inclusive of all factors with 10-year aging at 25°C board temperature)
  • 50mA typical current consumption at 3.3V and 156.25MHz LP-HCSL (VOH = 750mV)
  • 2.5V / 3.3V power supply (2.375V through 3.465V)
  • Industry standard 6-pin wettable flank package:
    • 3.2mm × 2.5mm (DLE)
    • Preview, contact TI: 2.0mm × 1.6mm (DLR)
  • AEC Q-200 qualified:
    • Device temperature grade 2: –40°C to +105°C
  • Output frequency:
    • Initial frequency offerings: 50, 100, 125, 156.25, 312.5, 625, 1250MHz
    • Other fixed frequencies on request
  • Output formats:
    • LP-HCSL: 50MHz to 625MHz
      • VOH options of 750mV or 850mV
    • LVDS, HS-LVDS, AC-LVPECL: 50MHz to 1250MHz
      • Output swing: 700mVppd to 2Vppd for 3.3V and 700mVppd to 1.6Vppd for 2.5V in 100mVppd step size
      • VCM LVDS, HS-LVDS = 1.2V and VCM AC-LVPECL = VDD/2
  • Ultra-low jitter:
    • 53fs typical RMS jitter at 156.25MHz LP-HCSL output
    • 41fs typical RMS jitter at 312.5MHz LP-HCSL output
    • 45fs typical RMS jitter at 312.5MHz HS-LVDS (1.2Vppd) output
  • Supports PCIe Gen 1 to Gen 7
  • Less than –78dBc spurs for 156.25MHz LP-HCSL PSRR performance (ripple frequencies greater than 10kHz, 50mV supply ripple, 0.1µF decoupling capacitor)
  • ±25ppm frequency accuracy (inclusive of all factors with 10-year aging at 25°C board temperature)
  • 50mA typical current consumption at 3.3V and 156.25MHz LP-HCSL (VOH = 750mV)
  • 2.5V / 3.3V power supply (2.375V through 3.465V)
  • Industry standard 6-pin wettable flank package:
    • 3.2mm × 2.5mm (DLE)
    • Preview, contact TI: 2.0mm × 1.6mm (DLR)

Texas Instruments’ high-precision bulk-acoustic wave (BAW) micro-resonator technology is integrated directly into a package allowing for low jitter clock circuitry. BAW is fully designed and manufactured at TI factories like other silicon-based fabrication processes.

The LMK6L-Q1 device is an ultra-low jitter, fixed frequency oscillator. This device incorporates the BAW as the resonator source. The device is factory programmed per specific operation mode including frequency, output type, function pin, and frequency stability.

The high-performance clocking, mechanical stability, flexibility, ultra-low jitter, and small package options for this device are designed for reference and core clocks in highspeed SerDes or SoC automotive applications.

Texas Instruments’ high-precision bulk-acoustic wave (BAW) micro-resonator technology is integrated directly into a package allowing for low jitter clock circuitry. BAW is fully designed and manufactured at TI factories like other silicon-based fabrication processes.

The LMK6L-Q1 device is an ultra-low jitter, fixed frequency oscillator. This device incorporates the BAW as the resonator source. The device is factory programmed per specific operation mode including frequency, output type, function pin, and frequency stability.

The high-performance clocking, mechanical stability, flexibility, ultra-low jitter, and small package options for this device are designed for reference and core clocks in highspeed SerDes or SoC automotive applications.

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* Hoja de datos LMK6L-Q1 Ultra-Low Jitter, High-performance Differential Automotive BAW Oscillator datasheet PDF | HTML 29/06/2026

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