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TPS650864

ACTIVO

PMIC multicarril configurable para MPSoC Xilinx y FPGA

Detalles del producto

Regulated outputs (#) 12, 13 Configurability Factory programmable, Software configurable Vin (min) (V) 5.6 Vin (max) (V) 21 Vout (min) (V) -0.3 Vout (max) (V) 5 Iout (max) (A) 25 Features Comm control, Dynamic voltage scaling, Enable, Enable pin, I2C control, Overcurrent protection, Power good, Power sequencing, Synchronous rectification, Thermal shutdown, UVLO fixed Step-up DC/DC converter 0 Step-down DC/DC converter 3 Step-down DC/DC controller 3 Step-up DC/DC controller 0 LDO 4 Iq (typ) (mA) 0.3 Rating Catalog Switching frequency (max) (kHz) 3100 Operating temperature range (°C) -40 to 85 Processor supplier Xilinx Processor name Artix-7, Zynq Ultrascale+ Shutdown current (ISD) (typ) (µA) 65 Switching frequency (typ) (kHz) 2500 Product type Processor and FPGA
Regulated outputs (#) 12, 13 Configurability Factory programmable, Software configurable Vin (min) (V) 5.6 Vin (max) (V) 21 Vout (min) (V) -0.3 Vout (max) (V) 5 Iout (max) (A) 25 Features Comm control, Dynamic voltage scaling, Enable, Enable pin, I2C control, Overcurrent protection, Power good, Power sequencing, Synchronous rectification, Thermal shutdown, UVLO fixed Step-up DC/DC converter 0 Step-down DC/DC converter 3 Step-down DC/DC controller 3 Step-up DC/DC controller 0 LDO 4 Iq (typ) (mA) 0.3 Rating Catalog Switching frequency (max) (kHz) 3100 Operating temperature range (°C) -40 to 85 Processor supplier Xilinx Processor name Artix-7, Zynq Ultrascale+ Shutdown current (ISD) (typ) (µA) 65 Switching frequency (typ) (kHz) 2500 Product type Processor and FPGA
VQFN (RSK) 64 64 mm² 8 x 8
  • Wide VIN Range from 5.6 V to 21 V
  • Three Variable-Output Voltage Synchronous Step-Down Controllers with D-CAP2™ Topology
    • Scalable Output Current Using External FETs With Selectable Current Limit
    • I2C DVS Control From 0.41 V to 1.67 V in 10-mV Steps or 1 V to 3.575 V in 25-mV Steps
  • Three Variable-Output Voltage Synchronous Step-Down Converters With DCS-Control Topology
    • VIN Range From 3 V to 5.5 V
    • Up to 3 A of Output Current
    • I2C DVS Control From 0.41 V to 1.67 V in 10-mV Steps or 0.425 V to 3.575 V in 25-mV Steps
  • Three LDO Regulators With Adjustable Output Voltage
    • LDOA1: I2C-Selectable Voltage From 1.35 V to 3.3 V for up to 200 mA of Output Current
    • LDOA2 and LDOA3: I2C-Selectable Voltage From 0.7 V to 1.5 V for up to 600 mA of Output Current Each
  • VTT LDO for DDR Memory Termination
  • Three Load Switches With Slew Rate Control
    • Up to 300 mA of Output Current With Voltage Drop Less Than 1.5% of Nominal Input Voltage
    • RDSON < 96 mΩ at Input Voltage of 1.8 V
  • 5-V Fixed-Output Voltage LDO (LDO5)
    • Power Supply for Gate Drivers of SMPS and for LDOA1
    • Automatic Switch to External 5-V Buck for Higher Efficiency
  • Built-in Flexibility and Configurability by Factory OTP Programming
    • Six GPI Pins Configurable to Enable (CTL1 to CTL6) or Sleep Mode Entry (CTL3 and CTL6) of Any Selected Rails
    • Four GPO Pins Configurable to Power Good of Any Selected Rails
    • Open-Drain Interrupt Output Pin
  • I2C Interface Supports Standard Mode (100 kHz), Fast Mode (400 kHz), and Fast Mode Plus (1 MHz)
  • Wide VIN Range from 5.6 V to 21 V
  • Three Variable-Output Voltage Synchronous Step-Down Controllers with D-CAP2™ Topology
    • Scalable Output Current Using External FETs With Selectable Current Limit
    • I2C DVS Control From 0.41 V to 1.67 V in 10-mV Steps or 1 V to 3.575 V in 25-mV Steps
  • Three Variable-Output Voltage Synchronous Step-Down Converters With DCS-Control Topology
    • VIN Range From 3 V to 5.5 V
    • Up to 3 A of Output Current
    • I2C DVS Control From 0.41 V to 1.67 V in 10-mV Steps or 0.425 V to 3.575 V in 25-mV Steps
  • Three LDO Regulators With Adjustable Output Voltage
    • LDOA1: I2C-Selectable Voltage From 1.35 V to 3.3 V for up to 200 mA of Output Current
    • LDOA2 and LDOA3: I2C-Selectable Voltage From 0.7 V to 1.5 V for up to 600 mA of Output Current Each
  • VTT LDO for DDR Memory Termination
  • Three Load Switches With Slew Rate Control
    • Up to 300 mA of Output Current With Voltage Drop Less Than 1.5% of Nominal Input Voltage
    • RDSON < 96 mΩ at Input Voltage of 1.8 V
  • 5-V Fixed-Output Voltage LDO (LDO5)
    • Power Supply for Gate Drivers of SMPS and for LDOA1
    • Automatic Switch to External 5-V Buck for Higher Efficiency
  • Built-in Flexibility and Configurability by Factory OTP Programming
    • Six GPI Pins Configurable to Enable (CTL1 to CTL6) or Sleep Mode Entry (CTL3 and CTL6) of Any Selected Rails
    • Four GPO Pins Configurable to Power Good of Any Selected Rails
    • Open-Drain Interrupt Output Pin
  • I2C Interface Supports Standard Mode (100 kHz), Fast Mode (400 kHz), and Fast Mode Plus (1 MHz)

The TPS650864 device family is a single-chip power-management IC (PMIC) designed for Xilinx Zynq multiprocessor system-on-chip (MPSoCs) and field programmable gate array (FPGA) families. The TPS650864 offers an input range of 5.6 V to 21 V, enabling a wide range of applications (see the Device Comparison Table). The device is targeted for wall-powered applications or 2S, 3S, or 4S Li-Ion battery packs (NVDC or non-NVDC power architectures). See the Typical Application section for 5-V input supplies. The D-CAP2 and DCS-Control high-frequency voltage regulators use small passives to achieve a small solution size. The D-CAP2 and DCS-Control topologies have excellent transient response performance, ideal for processor core and system memory rails that have fast load switching. An I2C interface allows simple control either by an embedded controller (EC) or by an SoC. The PMIC comes in an 8-mm × 8-mm, single-row VQFN package with thermal pad for good thermal dissipation.

The TPS650864 device family is a single-chip power-management IC (PMIC) designed for Xilinx Zynq multiprocessor system-on-chip (MPSoCs) and field programmable gate array (FPGA) families. The TPS650864 offers an input range of 5.6 V to 21 V, enabling a wide range of applications (see the Device Comparison Table). The device is targeted for wall-powered applications or 2S, 3S, or 4S Li-Ion battery packs (NVDC or non-NVDC power architectures). See the Typical Application section for 5-V input supplies. The D-CAP2 and DCS-Control high-frequency voltage regulators use small passives to achieve a small solution size. The D-CAP2 and DCS-Control topologies have excellent transient response performance, ideal for processor core and system memory rails that have fast load switching. An I2C interface allows simple control either by an embedded controller (EC) or by an SoC. The PMIC comes in an 8-mm × 8-mm, single-row VQFN package with thermal pad for good thermal dissipation.

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Documentación técnica

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Tipo Título Fecha
* Data sheet TPS650864 Configurable Multirail PMU for Xilinx MPSoCs and FPGAs datasheet (Rev. E) PDF | HTML 06 may 2021
Application note Using TPS65086x PMIC to Power Xilinx Zynq UltraScale+ MPSoCs PDF | HTML 28 oct 2021
Application note Push-Button Circuit (Rev. B) 01 nov 2017
Application note TPS65086x Schematic and Layout Checklist (Rev. A) 02 dic 2015
White paper Power management integrated buck controllers for distant point-of-load apps 14 ago 2015

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TPS650860EVM-116 — Módulo de evaluación TPS650860

Evaluation Module (EVM) for the TPS65086x family. The EVM provides a platform for engineers to evaluate, test, and explore the TPS650860 in a real world application use. All of the sequencing and functionality required for the processor and system is demonstrated on this board. This EVM also (...)

Guía del usuario: PDF
Modelo de simulación

Flotherm Model for TPS65086x products

SWCM008.ZIP (0 KB) - Thermal Model
Diseños de referencia

TIDA-01393 — Diseño de referencia de potencia para aplicaciones Xilinx® Zynq® UltraScale+™ MPSoC

This reference design is a configurable power solution designed to handle the entire Xilinx® Zynq® UltraScale+ (ZU+) family of MPSoC devices across various use cases.

The various versions of the TPS65086x PMIC allow this design to power devices from the basic ZU2CG device with a dual-core Arm® (...)

Design guide: PDF
Esquema: PDF
Paquete Pasadores Descargar
VQFN (RSK) 64 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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