The TPS65270 is a monolithic, dual synchronous buck regulator with a wide operating input voltage that can operate in 5-V, 9-V, 12-V, or 15-V bus voltages and battery chemistries. The converters are designed to simplify its application while giving the designer the option to optimize their usage according to the target application.
The TPS65270 features a precision 0.8-V reference and can produce output voltages up to 15 V. Each converter features an enable pin that allows dedicated control of each channel that provides flexibility for power sequencing. Soft-start time in each channel can be adjusted by choosing different external capacitors. TPS65270 is also able to start up with a prebiased output. The converter begins switching when output voltage reaches the prebiased voltage.
Constant frequency peak current-mode control simplifies the compensation and provides fast transient response. Cycle-by-cycle overcurrent protection and hiccup mode operation limits MOSFET power dissipation in short-circuit or overloading fault conditions. Low-side reverse current protection also prevents excessive sinking current from damaging the converter.
The switching frequency of the converters can be set from 300 KHz to 1.4 MHz with an external resistor. Two converters have 180° out-of-phase clock signals to minimize the input filter requirements and alleviate EMI and input capacitor requirements.
TPS65270 also features a light-load pulse skipping mode (PSM). The PSM mode allows a power loss reduction on the input power supplied to the system at light loading in order to achieve light-load high efficiency.
The TPS65270 is available in a 24-pin, thermally enhanced HTSSOP (PWP) package and 24-pin VQFN (RGE) package.
| Documentación principal | Tipo | Título | Opciones de formato | Descargar la versión más reciente en inglés | Fecha |
|---|---|---|---|---|---|
| * | Hoja de datos | TPS65270 4.5-V to 18-V Input Voltage, 2-A or 3-A Output Current, Dual Synchronous Step-Down Regulator With Integrated MOSFET datasheet (Rev. E) | PDF | HTML | 31/08/2016 | |
| Nota sobre la aplicación | Measure Power Stage Gain and Slope Compensation in PCM (Peak Current Mode) BUCK (Rev. A) | PDF | HTML | 1/04/2019 | ||
| Guía de selección | Power Management Guide 2018 (Rev. R) | 25/06/2018 | |||
| Nota sobre la aplicación | TPS65270 Loop Compensation Design Consideration | 29/03/2012 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
The TPS65270EVM evaluation module is designed to provide access to the features of the TPS65270. The TPS65270 PMIC is designed to provide 2-A and 3-A continuous currents with an operational range of 4.5 V to 16 V and an externally set switching frequency ranging from 300 kHz to 1.4 MHz. When the (...)
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| HTSSOP (PWP) | 24 | Ultra Librarian |
| VQFN (RGE) | 24 | Ultra Librarian |
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