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UCC21551-Q1

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Automotive Reinforced, 4A/6A dual-channel isolated gate driver w/ enable, programable dead time

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UCC21551-Q1

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Detalles del producto

Number of channels 2 Isolation rating Reinforced Power switch IGBT, MOSFET, SiCFET Withstand isolation voltage (VISO) (Vrms) 5000 Working isolation voltage (VIOWM) (Vrms) 1500 Transient isolation voltage (VIOTM) (VPK) 7070 Peak output current (source) (typ) (A) 4 Peak output current (sink) (typ) (A) 6 Features Enable, High CMTI, Programmable dead time Output VCC/VDD (min) (V) 13 Output VCC/VDD (max) (V) 25 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 150 Rating Automotive Fall time (ns) 8 Undervoltage lockout (typ) (V) 5, 8, 12, 17 TI functional safety category Functional Safety-Capable
Number of channels 2 Isolation rating Reinforced Power switch IGBT, MOSFET, SiCFET Withstand isolation voltage (VISO) (Vrms) 5000 Working isolation voltage (VIOWM) (Vrms) 1500 Transient isolation voltage (VIOTM) (VPK) 7070 Peak output current (source) (typ) (A) 4 Peak output current (sink) (typ) (A) 6 Features Enable, High CMTI, Programmable dead time Output VCC/VDD (min) (V) 13 Output VCC/VDD (max) (V) 25 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 5.5 Input threshold CMOS, TTL Operating temperature range (°C) -40 to 150 Rating Automotive Fall time (ns) 8 Undervoltage lockout (typ) (V) 5, 8, 12, 17 TI functional safety category Functional Safety-Capable
SOIC (DWK) 14 106.09 mm² (10.3 mm × 10.3 mm) SSOP (DFJ) 28 109.695 mm² (10.65 mm × 10.3 mm) SOIC (DW) 16 106.09 mm² (10.3 mm × 10.3 mm)
  • Universal: dual low-side, dual high-side or half-bridge driver
  • AEC-Q100 qualified with the following result
    • Device temperature grade 1
  • Junction temperature range –40 to +150°C
  • Up to 4A peak source and 6A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • CH-to-CH creepage:
    • >5.3mm in DFJ28 package
    • >3.3mm in DWK package
  • Up to 25V VDD output drive supply
    • 5V,8V, 12V and 17V VDD UVLO options
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast enable for power sequencing
  • Universal: dual low-side, dual high-side or half-bridge driver
  • AEC-Q100 qualified with the following result
    • Device temperature grade 1
  • Junction temperature range –40 to +150°C
  • Up to 4A peak source and 6A peak sink output
  • Common-mode transient immunity (CMTI) greater than 125V/ns
  • CH-to-CH creepage:
    • >5.3mm in DFJ28 package
    • >3.3mm in DWK package
  • Up to 25V VDD output drive supply
    • 5V,8V, 12V and 17V VDD UVLO options
  • Switching parameters:
    • 33ns typical propagation delay
    • 5ns maximum pulse-width distortion
    • 10µs maximum VDD power-up delay
  • UVLO protection for all power supplies
  • Fast enable for power sequencing

The UCC21551x-Q1 is an isolated dual channel gate driver family with programmable dead time and wide temperature range. The device is designed with 4A peak-source and 6A peak-sink current to drive power MOSFET, SiC, and IGBT transistors.

The UCC21551x-Q1 can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5kVRMS isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI). DFJ28 package offers >5.3mm CH-to-CH creepage to support high voltage systems.

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and integrated de-glitch filter that rejects input transients shorter than 5ns. All supplies have UVLO protection.

With all these advanced features, the UCC21551x-Q1 device enables high efficiency, high power density, and robustness in a wide variety of power applications.

The UCC21551x-Q1 is an isolated dual channel gate driver family with programmable dead time and wide temperature range. The device is designed with 4A peak-source and 6A peak-sink current to drive power MOSFET, SiC, and IGBT transistors.

The UCC21551x-Q1 can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver. The input side is isolated from the two output drivers by a 5kVRMS isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI). DFJ28 package offers >5.3mm CH-to-CH creepage to support high voltage systems.

Protection features include: resistor programmable dead time, disable feature to shut down both outputs simultaneously, and integrated de-glitch filter that rejects input transients shorter than 5ns. All supplies have UVLO protection.

With all these advanced features, the UCC21551x-Q1 device enables high efficiency, high power density, and robustness in a wide variety of power applications.
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Documentación técnica

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Documentación principal Tipo Título Opciones de formato Descargar la versión más reciente en inglés Fecha
* Hoja de datos UCC21551x-Q1 Automotive 4A, 6A, Reinforced Isolation Dual-Channel Gate Driver datasheet (Rev. I) PDF | HTML 23/12/2025
Certificado VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. AB) 15/07/2026
Nota sobre la aplicación Design Considerations for the Automotive PTC Header Module PDF | HTML 17/12/2024
Certificado CQC Certificate for UCC21551xx 27/08/2024
Información sobre seguridad funcional UCC21551x-Q1 Functional Safety FIT Rate, FMD and Pin FMA PDF | HTML 13/09/2023

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

UCC21551CQEVM-079 — Módulo de evaluación UCC21551 para controlador de puerta aislada de doble canal de 4 A y 6 A

El UCC21551CQEVM tiene una PCB de dos capas de cobre que contiene múltiples puntos de prueba y puentes para evaluar completamente la funcionalidad del UCC21551. El EVM cuenta con control de entrada PWM, fuente de alimentación ajustable integrada, zócalos para FET discretos, abrazadera activa (...)

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Modelo de simulación

UCC21551-Q1 PSpice Transient Reference Design Model

SLUM866.ZIP (175 KB) - Modelo PSpice
Productos y hardware compatibles
Modelo de simulación

UCC21551-Q1 TINA-TI Reference Design

SLUM863 (9409 KB) - Diseño de referencia TINA-TI
Productos y hardware compatibles
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (DWK) 14 Ultra Librarian
SSOP (DFJ) 28 Ultra Librarian
SOIC (DW) 16 Ultra Librarian
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