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UCC27222

新規設計での使用を推奨しません

高効率、予測可能、同期整流降圧ドライバ

ご注文はこちら
データシート
UCC27222 は新規設計での使用を推奨しません
これまでにご購入されたお客様をサポートする目的でこの製品を引き続き生産しています。新規設計では代替品をご検討ください。
open-in-new 代替品と比較
比較対象デバイスと同等の機能で、ピン配置が異なる製品。
UCC27302A アクティブ 5V UVLO (低電圧誤動作防止機能)、インターロック、イネーブル オプションが利用可能、120V、4.5A、ハーフブリッジ ドライバ More recent driver with integrated bootstrap diode, higher voltage rating, input interlock and smaller package options
UCC27311A アクティブ 8V UVLO とイネーブル搭載、120V、4.5A、ハーフブリッジ ドライバ オプション More recent driver with integrated bootstrap diode, higher voltage rating, 8V UVLO and smaller package options

UCC27222

新規設計での使用を推奨しません
データシート ご注文はこちら

製品詳細

Bootstrap supply voltage (max) (V) 30 Power switch MOSFET Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 20 Operating temperature range (°C) -40 to 105 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.06 Rise time (ns) 17 Fall time (ns) 17 Iq (mA) 4.7 Input threshold TTL Channel input logic TTL Switch node voltage (V) -0.3 Features Dead time control, Soft switching, Synchronous Rectification Driver configuration Inverting, Noninverting
Bootstrap supply voltage (max) (V) 30 Power switch MOSFET Input supply voltage (min) (V) 5 Input supply voltage (max) (V) 20 Operating temperature range (°C) -40 to 105 Undervoltage lockout (typ) (V) 4 Rating Catalog Propagation delay time (µs) 0.06 Rise time (ns) 17 Fall time (ns) 17 Iq (mA) 4.7 Input threshold TTL Channel input logic TTL Switch node voltage (V) -0.3 Features Dead time control, Soft switching, Synchronous Rectification Driver configuration Inverting, Noninverting
HTSSOP (PWP) 14 32 mm² (5 mm × 6.4 mm)
  • Maximizes Efficiency by Minimizing Body-Diode Conduction and Reverse Recovery Losses
  • Transparent Synchronous Buck Gate Drive Operation From the Single Ended PWM Input Signal
  • 12-V or 5-V Input Operation
  • 3.3-V Input Operation With Availability of 12-V Bus Bias
  • High-Side and Low-Side ±3-A Dual Drivers
  • On-Board 6.5-V Gate Drive Regulator
  • ±3.3-A TrueDrive™ Gate Drives for High Current Delivery at MOSFET Miller Thresholds
  • Automatically Adjusts for Changing Operating Conditions
  • Thermally Enhanced 14-Pins PowerPAD™ HTSSOP Package Minimizes Board Area and Junction Temperature Rise
  • APPLICATIONS
    • Non-Isolated Single or Multi-phased DC-to-DC Converters for Processor Power, General Computer, Telecom and Datacom Applications

Predictive Gate Drive™ and PowerPAD™ are trademarks of Texas Instruments Incorporated.
  • Maximizes Efficiency by Minimizing Body-Diode Conduction and Reverse Recovery Losses
  • Transparent Synchronous Buck Gate Drive Operation From the Single Ended PWM Input Signal
  • 12-V or 5-V Input Operation
  • 3.3-V Input Operation With Availability of 12-V Bus Bias
  • High-Side and Low-Side ±3-A Dual Drivers
  • On-Board 6.5-V Gate Drive Regulator
  • ±3.3-A TrueDrive™ Gate Drives for High Current Delivery at MOSFET Miller Thresholds
  • Automatically Adjusts for Changing Operating Conditions
  • Thermally Enhanced 14-Pins PowerPAD™ HTSSOP Package Minimizes Board Area and Junction Temperature Rise
  • APPLICATIONS
    • Non-Isolated Single or Multi-phased DC-to-DC Converters for Processor Power, General Computer, Telecom and Datacom Applications

Predictive Gate Drive™ and PowerPAD™ are trademarks of Texas Instruments Incorporated.

The UCC27221 and UCC27222 are high-speed synchronous buck drivers for today’s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive™ (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s). The UCC27221 has an inverted PWM input while the UCC27222 has a non-inverting PWM input.

Predictive Gate Drive™ technology uses control loops which are stabilized internally and are therefore transparent to the user. These loops use no external components, so no additional design is needed to take advantage of the higher efficiency of these drivers.

This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.

The UCC27221 and UCC27222 are offered in the thermally enhanced 14-pin PowerPAD package with 2°C/W jc.

The UCC27221 and UCC27222 are high-speed synchronous buck drivers for today’s high-efficiency, lower-output voltage designs. Using Predictive Gate Drive™ (PGD) control technology, these drivers reduce diode conduction and reverse recovery losses in the synchronous rectifier MOSFET(s). The UCC27221 has an inverted PWM input while the UCC27222 has a non-inverting PWM input.

Predictive Gate Drive™ technology uses control loops which are stabilized internally and are therefore transparent to the user. These loops use no external components, so no additional design is needed to take advantage of the higher efficiency of these drivers.

This closed loop feedback system detects body-diode conduction, and adjusts deadtime delays to minimize the conduction time interval. This virtually eliminates body-diode conduction while adjusting for temperature, load- dependent delays, and for different MOSFETs. Precise gate timing at the nanosecond level reduces the reverse recovery time of the synchronous rectifier MOSFET body-diode, reducing reverse recovery losses seen in the main (high-side) MOSFET. The lower junction temperature in the low-side MOSFET increases product reliability. Since the power dissipation is minimized, a higher switching frequency can also be used, allowing for smaller component sizes.

The UCC27221 and UCC27222 are offered in the thermally enhanced 14-pin PowerPAD package with 2°C/W jc.
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上位の文書 タイプ タイトル フォーマットオプション 最新の英語版をダウンロード 日付
* データシート High-Efficiency Predictive Synchronous Buck Driver データシート (Rev. B) 2003/07/16

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