제품 상세 정보

Technology family HC Bits (#) 2 Rating Military Operating temperature range (°C) -55 to 125
Technology family HC Bits (#) 2 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67
  • Typical Propagation Delay = 17ns at VCC = 5V, CL = 15pF, TA = 25°C
  • Replaces LS180 Types
  • Easily Cascadable
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range... –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

  • Typical Propagation Delay = 17ns at VCC = 5V, CL = 15pF, TA = 25°C
  • Replaces LS180 Types
  • Easily Cascadable
  • Fanout (Over Temperature Range)
    • Standard Outputs...10 LSTTL Loads
    • Bus Driver Outputs...15 LSTTL Loads
  • Wide Operating Temperature Range... –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

The ’HC280 and ’HCT280 are 9-bit odd/even parity, generator checker devices. Both even and odd parity outputs are available for checking or generating parity for words up to nine bits long. Even parity is indicated (E output to any input of an additional HC/HCT280 parity checker.

The ’HC280 and ’HCT280 are 9-bit odd/even parity, generator checker devices. Both even and odd parity outputs are available for checking or generating parity for words up to nine bits long. Even parity is indicated (E output to any input of an additional HC/HCT280 parity checker.

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기술 문서

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모두 보기15
유형 직함 날짜
* Data sheet CD54HC280, CD74HC280, CD54HCT280, CD74HCT280 datasheet (Rev. D) 2003/10/21
* SMD CD54HC280 SMD 8607701CA 2016/06/21
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 2021/07/26
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
User guide LOGIC Pocket Data Book (Rev. B) 2007/01/16
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08
User guide Signal Switch Data Book (Rev. A) 2003/11/14
Application note TI IBIS File Creation, Validation, and Distribution Processes 2002/08/29
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 1997/06/01
Application note Designing With Logic (Rev. C) 1997/06/01
Application note Input and Output Characteristics of Digital Integrated Circuits 1996/10/01
Application note Live Insertion 1996/10/01
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 1996/05/01
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996/04/01

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패키지 다운로드
CDIP (J) 14 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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