홈 클록 및 타이밍 클록 생성기
홈
클록 및 타이밍
클록 생성기

CDCE62002

활성

듀얼 VCO 통합을 지원하는 4출력 클록 생성기/지터 클리너

지금 주문
데이터 시트

CDCE62002

활성
데이터 시트 지금 주문

제품 상세 정보

Number of outputs 2 Output type LVPECL Output frequency (max) (MHz) 1175 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVPECL Operating temperature range (°C) -40 to 85 Features Design tool available, Integrated EEPROM, Serial interface Rating Catalog
Number of outputs 2 Output type LVPECL Output frequency (max) (MHz) 1175 Core supply voltage (V) 3.3 Output supply voltage (V) 3.3 Input type LVPECL Operating temperature range (°C) -40 to 85 Features Design tool available, Integrated EEPROM, Serial interface Rating Catalog
VQFN (RHB) 32 25 mm² 5 x 5
  • Frequency Synthesizer With PLL/VCO and Partially Integrated Loop Filter
  • Fully Configurable Outputs Including Frequency and Output Format
  • Smart Input Multiplexer Automatically Switches Between One of Two Reference Inputs
  • Multiple Operational Modes Include Clock Generation Through Crystal, SERDES Start-Up Mode, Jitter Cleaning, and Oscillator Based Holdover Mode
  • Integrated EEPROM Determines Device Configuration at Power Up
  • Excellent Jitter Performance
  • Integrated Frequency Synthesizer Including PLL, Multiple VCOs, and Loop Filter:
    • Full Programmability Facilitates Phase Noise Performance Optimization Enabling Jitter Cleaner Mode
    • Programmable Charge Pump Gain and Loop Filter Settings
    • Unique Dual-VCO Architecture Supports a Wide Tuning Range 1.750 GHz to 2.356 GHz.
  • Universal Output Blocks Support Up to 2 Differential, 4 Single-Ended, or Combinations of Differential or Single-Ended:
    • 0.5 ps RMS (10 kHz to 20 MHz) Output Jitter Performance
    • Low Output Phase Noise: –130 dBc/Hz at 1 MHz Offset, Fc = 491.52 MHz
    • Output Frequency Ranges From 10.94 MHz to 1.175 GHz in Synthesizer Mode
    • LVPECL, LVDS, and LVCMOS
    • Independent Output Dividers Support Divide Ratios for 1, 2, 3, 4, 5, 8, 10, 12, 16, 20, 24, and 32
  • Flexible Inputs With Innovative Smart Multiplexer:
    • Two Universal Differential Inputs Accept Frequencies from 1 MHz up to 500 MHz (LVPECL), 500 MHz (LVDS), or 250 MHz (LVCMOS)
    • One Auxiliary Input Accepts Crystals in the Range of 2 MHz to 42 MHz
    • Clock Generator Mode Using Crystal Input
    • Smart Input Multiplexer Can be Configured to Automatically Switch Between Highest Priority Clock Source Available Allowing for Fail-Safe Operation
  • Typical Power Consumption 750 mW at 3.3 V
  • Integrated EEPROM Stores Default Settings; Therefore, the Device Can Power Up in a Known, Predefined State
  • Offered in QFN-32 Package
  • ESD Protection Exceeds 2000 V HBM
  • Industrial Temperature Range: –40°C to +85°C
  • APPLICATIONS
    • Data Converter and Data Aggregation Clocking
    • Wireless Infrastructure
    • Switches and Routers
    • Medical Electronics
    • Military and Aerospace
    • Industrial
    • Clock Generation and Jitter Cleaning


All other trademarks are the property of their respective owners
  • Frequency Synthesizer With PLL/VCO and Partially Integrated Loop Filter
  • Fully Configurable Outputs Including Frequency and Output Format
  • Smart Input Multiplexer Automatically Switches Between One of Two Reference Inputs
  • Multiple Operational Modes Include Clock Generation Through Crystal, SERDES Start-Up Mode, Jitter Cleaning, and Oscillator Based Holdover Mode
  • Integrated EEPROM Determines Device Configuration at Power Up
  • Excellent Jitter Performance
  • Integrated Frequency Synthesizer Including PLL, Multiple VCOs, and Loop Filter:
    • Full Programmability Facilitates Phase Noise Performance Optimization Enabling Jitter Cleaner Mode
    • Programmable Charge Pump Gain and Loop Filter Settings
    • Unique Dual-VCO Architecture Supports a Wide Tuning Range 1.750 GHz to 2.356 GHz.
  • Universal Output Blocks Support Up to 2 Differential, 4 Single-Ended, or Combinations of Differential or Single-Ended:
    • 0.5 ps RMS (10 kHz to 20 MHz) Output Jitter Performance
    • Low Output Phase Noise: –130 dBc/Hz at 1 MHz Offset, Fc = 491.52 MHz
    • Output Frequency Ranges From 10.94 MHz to 1.175 GHz in Synthesizer Mode
    • LVPECL, LVDS, and LVCMOS
    • Independent Output Dividers Support Divide Ratios for 1, 2, 3, 4, 5, 8, 10, 12, 16, 20, 24, and 32
  • Flexible Inputs With Innovative Smart Multiplexer:
    • Two Universal Differential Inputs Accept Frequencies from 1 MHz up to 500 MHz (LVPECL), 500 MHz (LVDS), or 250 MHz (LVCMOS)
    • One Auxiliary Input Accepts Crystals in the Range of 2 MHz to 42 MHz
    • Clock Generator Mode Using Crystal Input
    • Smart Input Multiplexer Can be Configured to Automatically Switch Between Highest Priority Clock Source Available Allowing for Fail-Safe Operation
  • Typical Power Consumption 750 mW at 3.3 V
  • Integrated EEPROM Stores Default Settings; Therefore, the Device Can Power Up in a Known, Predefined State
  • Offered in QFN-32 Package
  • ESD Protection Exceeds 2000 V HBM
  • Industrial Temperature Range: –40°C to +85°C
  • APPLICATIONS
    • Data Converter and Data Aggregation Clocking
    • Wireless Infrastructure
    • Switches and Routers
    • Medical Electronics
    • Military and Aerospace
    • Industrial
    • Clock Generation and Jitter Cleaning


All other trademarks are the property of their respective owners

The CDCE62002 device is a high-performance clock generator featuring low output jitter, a high degree of configurability through a SPI interface, and programmable start-up modes determined by on-chip EEPROM. Specifically tailored for clocking data converters and high-speed digital signals, the CDCE62002 achieves jitter performance under 0.5 ps RMS(1).

It incorporates a synthesizer block with partially integrated loop filter, a clock distribution block including programmable output formats, and an input block featuring an innovative smart multiplexer. The clock distribution block includes two individually programmable outputs that can be configured to provide different combinations of output formats (LVPECL, LVDS, LVCMOS). Each output can also be programmed to a unique output frequency (ranging from 10.94 MHz to 1.175 GHz(2)). If Both outputs are configured in single-ended mode (such as LVCMOS), the CDCE62002 supports up to four outputs. The input block includes one universal differential inputs which support frequencies up to 500 MHz and an auxiliary input that can be configured to connect to an external AT-Cut crystal through an onboard oscillator block. The smart input multiplexer has two modes of operation, manual and automatic. In manual mode, the user selects the synthesizer reference through the SPI interface. In automatic mode, the input multiplexer will automatically select between the highest priority input clock available.

(1) 10-kHz to 20-MHz integration bandwidth.
(2) Frequency range depends on operational mode and output format selected.

The CDCE62002 device is a high-performance clock generator featuring low output jitter, a high degree of configurability through a SPI interface, and programmable start-up modes determined by on-chip EEPROM. Specifically tailored for clocking data converters and high-speed digital signals, the CDCE62002 achieves jitter performance under 0.5 ps RMS(1).

It incorporates a synthesizer block with partially integrated loop filter, a clock distribution block including programmable output formats, and an input block featuring an innovative smart multiplexer. The clock distribution block includes two individually programmable outputs that can be configured to provide different combinations of output formats (LVPECL, LVDS, LVCMOS). Each output can also be programmed to a unique output frequency (ranging from 10.94 MHz to 1.175 GHz(2)). If Both outputs are configured in single-ended mode (such as LVCMOS), the CDCE62002 supports up to four outputs. The input block includes one universal differential inputs which support frequencies up to 500 MHz and an auxiliary input that can be configured to connect to an external AT-Cut crystal through an onboard oscillator block. The smart input multiplexer has two modes of operation, manual and automatic. In manual mode, the user selects the synthesizer reference through the SPI interface. In automatic mode, the input multiplexer will automatically select between the highest priority input clock available.

(1) 10-kHz to 20-MHz integration bandwidth.
(2) Frequency range depends on operational mode and output format selected.
filter 기타 클록 생성기 찾기
다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능
CDCM6208 활성 2:8 초저전력, 저지터 클록 제너레이터 Higher performance compared to CDCE62002

기술 자료

star =TI에서 선정한 이 제품의 인기 문서
검색된 결과가 없습니다. 검색어를 지우고 다시 시도하십시오.
2개 모두 보기
유형 직함 날짜
* Data sheet CDCE62002 Four Output Clock Generator/Jitter Cleaner With Integrated Dual VCOs datasheet (Rev. E) PDF | HTML 2016/10/09
User guide Two/Four Output Low Noise Clock Evaluation Board 2009/06/19

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

CDCE62002EVM — CDCE62002 평가 모듈

CDCE62002EVM is the evaluation module for CDCE62002. The CDCE62002 is a high performance clock generator featuring low output jitter, a high degree of configurability via a SPI interface, and programmable start up modes determined by on-chip EEPROM. The CDCE62002 achieves jitter performance under (...)

사용 설명서: PDF
TI.com에서 구매 불가
평가 모듈(EVM)용 GUI

SCAC112 — CDCE62002EVM GUI

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

제품
클록 생성기
  • CDCE62002 — 듀얼 VCO 통합을 지원하는 4출력 클록 생성기/지터 클리너
하드웨어 개발
평가 보드
다운로드 옵션
시뮬레이션 모델

CDCE62002 IBIS Model

SCAM063.ZIP (68 KB) - IBIS Model
다운로드
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 착수하기 (...)
요청
패키지 핀 CAD 기호, 풋프린트 및 3D 모델
VQFN (RHB) 32 Ultra Librarian
TI의 평가 항목에 대한 표준 약관이 적용됩니다.

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

포럼 주제 모두 보기(영문)

콘텐츠는 TI 및 커뮤니티 기고자에 의해 "있는 그대로" 제공되며 TI의 사양으로 간주되지 않습니다. 사용 약관을 참조하십시오.

품질, 패키징, TI에서 주문하는 데 대한 질문이 있다면 TI 지원을 방문하세요. ​​​​​​​​​​​​​​

동영상