SN74LVC3G07-Q1

Name: SN74LVC3G07-Q1
Brand: TI
SKU: SN74LVC3G07-Q1
Price: 0.338 USD

활성

오픈 드레인 출력을 지원하는 오토모티브 3채널, 1.65V~5.5V 버퍼

지금 주문

데이터 시트

document-pdfAcrobat Triple Buffer/Driver With Open-Drain Outputs datasheet (Rev. B) (영어)

SN74LVC3G07-Q1

활성

데이터 시트

지금 주문

제품 상세 정보

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

Input type

Standard CMOS

Output type

Open-drain

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Rating

Automotive

Operating temperature range (°C)

-40 to 125

Technology family

LVC

Supply voltage (min) (V)

1.65

Supply voltage (max) (V)

5.5

Number of channels

IOL (max) (mA)

Supply current (max) (µA)

IOH (max) (mA)

Input type

Standard CMOS

Output type

Open-drain

Features

Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns)

Rating

Automotive

Operating temperature range (°C)

-40 to 125

VSSOP (DCU)

6.2 mm² 2 x 3.1

Qualified for Automotive Applications
Supports 5-V V_CC Operation
Max t_pd of 3.7 ns at 3.3 V
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
Input and Open-Drain Output Accepts Voltages up to 5.5 V
Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) >2 V at V_CC = 3.3 V, T_A = 25°C
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

Qualified for Automotive Applications
Supports 5-V V_CC Operation
Max t_pd of 3.7 ns at 3.3 V
Low Power Consumption, 10-µA Max I_CC
±24-mA Output Drive at 3.3 V
Input and Open-Drain Output Accepts Voltages up to 5.5 V
Typical V_OLP (Output Ground Bounce) <0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) >2 V at V_CC = 3.3 V, T_A = 25°C
I_off Supports Partial-Power-Down Mode Operation
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)

This triple buffer/driver is designed for 1.65-V to 5.5-V V_CC operation.

The output of the SN74LVC3G07 is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.

This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This triple buffer/driver is designed for 1.65-V to 5.5-V V_CC operation.

The output of the SN74LVC3G07 is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.

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기타 비인버팅 버퍼 및 드라이버 찾기

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기술 자료

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29개 모두 보기

	유형	직함		날짜
*	Data sheet	Triple Buffer/Driver With Open-Drain Outputs datasheet (Rev. B)		2008/04/10
	Functional safety information	SN74LVC3G07-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FM	PDF \| HTML	2021/09/29
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		2021/07/26
	Selection guide	Little Logic Guide 2018 (Rev. G)		2018/07/06
	Application note	How to Select Little Logic (Rev. A)		2016/07/26
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		2015/12/02
	More literature	Automotive Logic Devices Brochure		2014/08/27
	User guide	LOGIC Pocket Data Book (Rev. B)		2007/01/16
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		2004/11/04
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		2004/07/08
	Application note	Selecting the Right Level Translation Solution (Rev. A)		2004/06/22
	User guide	Signal Switch Data Book (Rev. A)		2003/11/14
	Application note	Use of the CMOS Unbuffered Inverter in Oscillator Circuits		2003/11/06
	User guide	LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)		2002/12/18
	Application note	Texas Instruments Little Logic Application Report		2002/11/01
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		2002/08/29
	More literature	Standard Linear & Logic for PCs, Servers & Motherboards		2002/06/13
	Application note	16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)		2002/05/22
	Application note	Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices		2002/05/10
	More literature	STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS		2002/03/27
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices		1997/12/01
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)		1997/08/01
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		1997/06/01
	Application note	LVC Characterization Information		1996/12/01
	Application note	Input and Output Characteristics of Digital Integrated Circuits		1996/10/01
	Application note	Live Insertion		1996/10/01
	Design guide	Low-Voltage Logic (LVC) Designer's Guide		1996/09/01
	Application note	Understanding Advanced Bus-Interface Products Design Guide		1996/05/01
	Selection guide	Logic Guide (Rev. AC)	PDF \| HTML	1994/06/01

설계 및 개발

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사용 설명서: PDF

TI.com에서 구매 불가

시뮬레이션 모델

SN74LVC3G07 Behavioral SPICE Model

SCEM604.ZIP (7 KB) - PSpice Model

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회로도: PDF